diff options
Diffstat (limited to 'gmp-6.3.0/mpn/x86_64/pentium4')
20 files changed, 1868 insertions, 0 deletions
diff --git a/gmp-6.3.0/mpn/x86_64/pentium4/addmul_2.asm b/gmp-6.3.0/mpn/x86_64/pentium4/addmul_2.asm new file mode 100644 index 0000000..7ae6a1a --- /dev/null +++ b/gmp-6.3.0/mpn/x86_64/pentium4/addmul_2.asm @@ -0,0 +1,37 @@ +dnl X86-64 mpn_addmul_2 optimised for Intel Nocona. + +dnl Copyright 2018 Free Software Foundation, Inc. + +dnl This file is part of the GNU MP Library. +dnl +dnl The GNU MP Library is free software; you can redistribute it and/or modify +dnl it under the terms of either: +dnl +dnl * the GNU Lesser General Public License as published by the Free +dnl Software Foundation; either version 3 of the License, or (at your +dnl option) any later version. +dnl +dnl or +dnl +dnl * the GNU General Public License as published by the Free Software +dnl Foundation; either version 2 of the License, or (at your option) any +dnl later version. +dnl +dnl or both in parallel, as here. +dnl +dnl The GNU MP Library is distributed in the hope that it will be useful, but +dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +dnl for more details. +dnl +dnl You should have received copies of the GNU General Public License and the +dnl GNU Lesser General Public License along with the GNU MP Library. If not, +dnl see https://www.gnu.org/licenses/. + +include(`../config.m4') + +ABI_SUPPORT(DOS64) +ABI_SUPPORT(STD64) + +MULFUNC_PROLOGUE(mpn_addmul_2) +include_mpn(`x86_64/bd1/addmul_2.asm') diff --git a/gmp-6.3.0/mpn/x86_64/pentium4/aors_n.asm b/gmp-6.3.0/mpn/x86_64/pentium4/aors_n.asm new file mode 100644 index 0000000..8e6ee1b --- /dev/null +++ b/gmp-6.3.0/mpn/x86_64/pentium4/aors_n.asm @@ -0,0 +1,196 @@ +dnl x86-64 mpn_add_n/mpn_sub_n optimized for Pentium 4. + +dnl Contributed to the GNU project by Torbjorn Granlund. + +dnl Copyright 2007, 2008, 2010-2012 Free Software Foundation, Inc. + +dnl This file is part of the GNU MP Library. +dnl +dnl The GNU MP Library is free software; you can redistribute it and/or modify +dnl it under the terms of either: +dnl +dnl * the GNU Lesser General Public License as published by the Free +dnl Software Foundation; either version 3 of the License, or (at your +dnl option) any later version. +dnl +dnl or +dnl +dnl * the GNU General Public License as published by the Free Software +dnl Foundation; either version 2 of the License, or (at your option) any +dnl later version. +dnl +dnl or both in parallel, as here. +dnl +dnl The GNU MP Library is distributed in the hope that it will be useful, but +dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +dnl for more details. +dnl +dnl You should have received copies of the GNU General Public License and the +dnl GNU Lesser General Public License along with the GNU MP Library. If not, +dnl see https://www.gnu.org/licenses/. + +include(`../config.m4') + + +C cycles/limb +C AMD K8,K9 2.8 +C AMD K10 2.8 +C Intel P4 4 +C Intel core2 3.6-5 (fluctuating) +C Intel corei ? +C Intel atom ? +C VIA nano ? + + +C INPUT PARAMETERS +define(`rp', `%rdi') +define(`up', `%rsi') +define(`vp', `%rdx') +define(`n', `%rcx') +define(`cy', `%r8') + +ifdef(`OPERATION_add_n', ` + define(ADDSUB, add) + define(func, mpn_add_n) + define(func_nc, mpn_add_nc)') +ifdef(`OPERATION_sub_n', ` + define(ADDSUB, sub) + define(func, mpn_sub_n) + define(func_nc, mpn_sub_nc)') + +ABI_SUPPORT(DOS64) +ABI_SUPPORT(STD64) + +MULFUNC_PROLOGUE(mpn_add_n mpn_add_nc mpn_sub_n mpn_sub_nc) +ASM_START() + TEXT +PROLOGUE(func) + FUNC_ENTRY(4) + xor %r8, %r8 +IFDOS(` jmp L(ent) ') +EPILOGUE() +PROLOGUE(func_nc) + FUNC_ENTRY(4) +IFDOS(` mov 56(%rsp), %r8 ') +L(ent): push %rbx + push %r12 + + mov (vp), %r9 + + mov R32(n), R32(%rax) + and $3, R32(%rax) + jne L(n00) C n = 0, 4, 8, ... + mov R32(%r8), R32(%rbx) + mov (up), %r8 + mov 8(up), %r10 + ADDSUB %r9, %r8 + mov 8(vp), %r9 + setc R8(%rax) + lea -16(rp), rp + jmp L(L00) + +L(n00): cmp $2, R32(%rax) + jnc L(n01) C n = 1, 5, 9, ... + mov (up), %r11 + mov R32(%r8), R32(%rax) + xor R32(%rbx), R32(%rbx) + dec n + jnz L(gt1) + ADDSUB %r9, %r11 + setc R8(%rbx) + ADDSUB %rax, %r11 + adc $0, R32(%rbx) + mov %r11, (rp) + jmp L(ret) +L(gt1): mov 8(up), %r8 + ADDSUB %r9, %r11 + mov 8(vp), %r9 + setc R8(%rbx) + lea -8(rp), rp + lea 8(up), up + lea 8(vp), vp + jmp L(L01) + +L(n01): jne L(n10) C n = 2, 6, 10, ... + mov (up), %r12 + mov R32(%r8), R32(%rbx) + mov 8(up), %r11 + ADDSUB %r9, %r12 + mov 8(vp), %r9 + setc R8(%rax) + lea -32(rp), rp + lea 16(up), up + lea 16(vp), vp + jmp L(L10) + +L(n10): mov (up), %r10 C n = 3, 7, 11, ... + mov R32(%r8), R32(%rax) + xor R32(%rbx), R32(%rbx) + mov 8(up), %r12 + ADDSUB %r9, %r10 + mov 8(vp), %r9 + setc R8(%rbx) + lea -24(rp), rp + lea -8(up), up + lea -8(vp), vp + jmp L(L11) + +L(c0): mov $1, R8(%rbx) + jmp L(rc0) +L(c1): mov $1, R8(%rax) + jmp L(rc1) +L(c2): mov $1, R8(%rbx) + jmp L(rc2) +L(c3): mov $1, R8(%rax) + jmp L(rc3) + + ALIGN(16) +L(top): mov (up), %r8 C not on critical path + ADDSUB %r9, %r11 C not on critical path + mov (vp), %r9 C not on critical path + setc R8(%rbx) C save carry out + mov %r12, (rp) +L(L01): ADDSUB %rax, %r11 C apply previous carry out + jc L(c0) C jump if ripple +L(rc0): mov 8(up), %r10 + ADDSUB %r9, %r8 + mov 8(vp), %r9 + setc R8(%rax) + mov %r11, 8(rp) +L(L00): ADDSUB %rbx, %r8 + jc L(c1) +L(rc1): mov 16(up), %r12 + ADDSUB %r9, %r10 + mov 16(vp), %r9 + setc R8(%rbx) + mov %r8, 16(rp) +L(L11): ADDSUB %rax, %r10 + jc L(c2) +L(rc2): mov 24(up), %r11 + ADDSUB %r9, %r12 + lea 32(up), up + mov 24(vp), %r9 + lea 32(vp), vp + setc R8(%rax) + mov %r10, 24(rp) +L(L10): ADDSUB %rbx, %r12 + jc L(c3) +L(rc3): lea 32(rp), rp + sub $4, n + ja L(top) + +L(end): ADDSUB %r9, %r11 + setc R8(%rbx) + mov %r12, (rp) + ADDSUB %rax, %r11 + jnc L(1) + mov $1, R8(%rbx) +L(1): mov %r11, 8(rp) + +L(ret): mov R32(%rbx), R32(%rax) + pop %r12 + pop %rbx + FUNC_EXIT() + ret +EPILOGUE() diff --git a/gmp-6.3.0/mpn/x86_64/pentium4/aorslsh1_n.asm b/gmp-6.3.0/mpn/x86_64/pentium4/aorslsh1_n.asm new file mode 100644 index 0000000..66937d3 --- /dev/null +++ b/gmp-6.3.0/mpn/x86_64/pentium4/aorslsh1_n.asm @@ -0,0 +1,50 @@ +dnl AMD64 mpn_addlsh1_n, mpn_sublsh1_n -- rp[] = up[] +- (vp[] << 1), +dnl optimised for Pentium 4. + +dnl Contributed to the GNU project by Torbjorn Granlund. + +dnl Copyright 2008, 2010-2012 Free Software Foundation, Inc. + +dnl This file is part of the GNU MP Library. +dnl +dnl The GNU MP Library is free software; you can redistribute it and/or modify +dnl it under the terms of either: +dnl +dnl * the GNU Lesser General Public License as published by the Free +dnl Software Foundation; either version 3 of the License, or (at your +dnl option) any later version. +dnl +dnl or +dnl +dnl * the GNU General Public License as published by the Free Software +dnl Foundation; either version 2 of the License, or (at your option) any +dnl later version. +dnl +dnl or both in parallel, as here. +dnl +dnl The GNU MP Library is distributed in the hope that it will be useful, but +dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +dnl for more details. +dnl +dnl You should have received copies of the GNU General Public License and the +dnl GNU Lesser General Public License along with the GNU MP Library. If not, +dnl see https://www.gnu.org/licenses/. + +include(`../config.m4') + +define(LSH, 1) +define(RSH, 31) C 31, not 63, since we use 32-bit ops + +ifdef(`OPERATION_addlsh1_n', ` + define(ADDSUB, add) + define(func, mpn_addlsh1_n)') +ifdef(`OPERATION_sublsh1_n', ` + define(ADDSUB, sub) + define(func, mpn_sublsh1_n)') + +ABI_SUPPORT(DOS64) +ABI_SUPPORT(STD64) + +MULFUNC_PROLOGUE(mpn_addlsh1_n mpn_sublsh1_n) +include_mpn(`x86_64/pentium4/aorslshC_n.asm') diff --git a/gmp-6.3.0/mpn/x86_64/pentium4/aorslsh2_n.asm b/gmp-6.3.0/mpn/x86_64/pentium4/aorslsh2_n.asm new file mode 100644 index 0000000..001f0ac --- /dev/null +++ b/gmp-6.3.0/mpn/x86_64/pentium4/aorslsh2_n.asm @@ -0,0 +1,50 @@ +dnl AMD64 mpn_addlsh2_n, mpn_sublsh2_n -- rp[] = up[] +- (vp[] << 2), +dnl optimised for Pentium 4. + +dnl Contributed to the GNU project by Torbjorn Granlund. + +dnl Copyright 2008, 2010-2012 Free Software Foundation, Inc. + +dnl This file is part of the GNU MP Library. +dnl +dnl The GNU MP Library is free software; you can redistribute it and/or modify +dnl it under the terms of either: +dnl +dnl * the GNU Lesser General Public License as published by the Free +dnl Software Foundation; either version 3 of the License, or (at your +dnl option) any later version. +dnl +dnl or +dnl +dnl * the GNU General Public License as published by the Free Software +dnl Foundation; either version 2 of the License, or (at your option) any +dnl later version. +dnl +dnl or both in parallel, as here. +dnl +dnl The GNU MP Library is distributed in the hope that it will be useful, but +dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +dnl for more details. +dnl +dnl You should have received copies of the GNU General Public License and the +dnl GNU Lesser General Public License along with the GNU MP Library. If not, +dnl see https://www.gnu.org/licenses/. + +include(`../config.m4') + +define(LSH, 2) +define(RSH, 30) C 30, not 62, since we use 32-bit ops + +ifdef(`OPERATION_addlsh2_n', ` + define(ADDSUB, add) + define(func, mpn_addlsh2_n)') +ifdef(`OPERATION_sublsh2_n', ` + define(ADDSUB, sub) + define(func, mpn_sublsh2_n)') + +ABI_SUPPORT(DOS64) +ABI_SUPPORT(STD64) + +MULFUNC_PROLOGUE(mpn_addlsh2_n mpn_sublsh2_n) +include_mpn(`x86_64/pentium4/aorslshC_n.asm') diff --git a/gmp-6.3.0/mpn/x86_64/pentium4/aorslshC_n.asm b/gmp-6.3.0/mpn/x86_64/pentium4/aorslshC_n.asm new file mode 100644 index 0000000..d03c6a3 --- /dev/null +++ b/gmp-6.3.0/mpn/x86_64/pentium4/aorslshC_n.asm @@ -0,0 +1,203 @@ +dnl AMD64 mpn_addlshC_n, mpn_sublshC_n -- rp[] = up[] +- (vp[] << C), where +dnl C is 1, 2, 3. Optimized for Pentium 4. + +dnl Contributed to the GNU project by Torbjorn Granlund. + +dnl Copyright 2008, 2010-2012 Free Software Foundation, Inc. + +dnl This file is part of the GNU MP Library. +dnl +dnl The GNU MP Library is free software; you can redistribute it and/or modify +dnl it under the terms of either: +dnl +dnl * the GNU Lesser General Public License as published by the Free +dnl Software Foundation; either version 3 of the License, or (at your +dnl option) any later version. +dnl +dnl or +dnl +dnl * the GNU General Public License as published by the Free Software +dnl Foundation; either version 2 of the License, or (at your option) any +dnl later version. +dnl +dnl or both in parallel, as here. +dnl +dnl The GNU MP Library is distributed in the hope that it will be useful, but +dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +dnl for more details. +dnl +dnl You should have received copies of the GNU General Public License and the +dnl GNU Lesser General Public License along with the GNU MP Library. If not, +dnl see https://www.gnu.org/licenses/. + +C cycles/limb +C AMD K8,K9 3.8 +C AMD K10 3.8 +C Intel P4 5.8 +C Intel core2 4.75 +C Intel corei 4.75 +C Intel atom ? +C VIA nano 4.75 + + +C INPUT PARAMETERS +define(`rp',`%rdi') +define(`up',`%rsi') +define(`vp',`%rdx') +define(`n', `%rcx') + +define(M, eval(m4_lshift(1,LSH))) + +ABI_SUPPORT(DOS64) +ABI_SUPPORT(STD64) + +ASM_START() + TEXT + ALIGN(16) +PROLOGUE(func) + FUNC_ENTRY(4) + push %rbx + push %r12 + push %rbp + + mov (vp), %r9 + shl $LSH, %r9 + mov 4(vp), R32(%rbp) + + xor R32(%rbx), R32(%rbx) + + mov R32(n), R32(%rax) + and $3, R32(%rax) + jne L(n00) C n = 0, 4, 8, ... + + mov (up), %r8 + mov 8(up), %r10 + shr $RSH, R32(%rbp) + ADDSUB %r9, %r8 + mov 8(vp), %r9 + lea (%rbp,%r9,M), %r9 + setc R8(%rax) + mov 12(vp), R32(%rbp) + lea -16(rp), rp + jmp L(L00) + +L(n00): cmp $2, R32(%rax) + jnc L(n01) C n = 1, 5, 9, ... + mov (up), %r11 + lea -8(rp), rp + shr $RSH, R32(%rbp) + ADDSUB %r9, %r11 + setc R8(%rbx) + dec n + jz L(1) C jump for n = 1 + mov 8(up), %r8 + mov 8(vp), %r9 + lea (%rbp,%r9,M), %r9 + mov 12(vp), R32(%rbp) + lea 8(up), up + lea 8(vp), vp + jmp L(L01) + +L(n01): jne L(n10) C n = 2, 6, 10, ... + mov (up), %r12 + mov 8(up), %r11 + shr $RSH, R32(%rbp) + ADDSUB %r9, %r12 + mov 8(vp), %r9 + lea (%rbp,%r9,M), %r9 + setc R8(%rax) + mov 12(vp), R32(%rbp) + lea 16(up), up + lea 16(vp), vp + jmp L(L10) + +L(n10): mov (up), %r10 + mov 8(up), %r12 + shr $RSH, R32(%rbp) + ADDSUB %r9, %r10 + mov 8(vp), %r9 + lea (%rbp,%r9,M), %r9 + setc R8(%rbx) + mov 12(vp), R32(%rbp) + lea -24(rp), rp + lea -8(up), up + lea -8(vp), vp + jmp L(L11) + +L(c0): mov $1, R8(%rbx) + jmp L(rc0) +L(c1): mov $1, R8(%rax) + jmp L(rc1) +L(c2): mov $1, R8(%rbx) + jmp L(rc2) + + ALIGN(16) +L(top): mov (up), %r8 C not on critical path + shr $RSH, R32(%rbp) + ADDSUB %r9, %r11 C not on critical path + mov (vp), %r9 + lea (%rbp,%r9,M), %r9 + setc R8(%rbx) C save carry out + mov 4(vp), R32(%rbp) + mov %r12, (rp) + ADDSUB %rax, %r11 C apply previous carry out + jc L(c0) C jump if ripple +L(rc0): +L(L01): mov 8(up), %r10 + shr $RSH, R32(%rbp) + ADDSUB %r9, %r8 + mov 8(vp), %r9 + lea (%rbp,%r9,M), %r9 + setc R8(%rax) + mov 12(vp), R32(%rbp) + mov %r11, 8(rp) + ADDSUB %rbx, %r8 + jc L(c1) +L(rc1): +L(L00): mov 16(up), %r12 + shr $RSH, R32(%rbp) + ADDSUB %r9, %r10 + mov 16(vp), %r9 + lea (%rbp,%r9,M), %r9 + setc R8(%rbx) + mov 20(vp), R32(%rbp) + mov %r8, 16(rp) + ADDSUB %rax, %r10 + jc L(c2) +L(rc2): +L(L11): mov 24(up), %r11 + shr $RSH, R32(%rbp) + ADDSUB %r9, %r12 + mov 24(vp), %r9 + lea (%rbp,%r9,M), %r9 + lea 32(up), up + lea 32(vp), vp + setc R8(%rax) + mov -4(vp), R32(%rbp) + mov %r10, 24(rp) + ADDSUB %rbx, %r12 + jc L(c3) +L(rc3): lea 32(rp), rp +L(L10): sub $4, n + ja L(top) + +L(end): + shr $RSH, R32(%rbp) + ADDSUB %r9, %r11 + setc R8(%rbx) + mov %r12, (rp) + ADDSUB %rax, %r11 + jnc L(1) + mov $1, R8(%rbx) +L(1): mov %r11, 8(rp) + lea (%rbx,%rbp), R32(%rax) + pop %rbp + pop %r12 + pop %rbx + FUNC_EXIT() + ret +L(c3): mov $1, R8(%rax) + jmp L(rc3) +EPILOGUE() +ASM_END() diff --git a/gmp-6.3.0/mpn/x86_64/pentium4/aorsmul_1.asm b/gmp-6.3.0/mpn/x86_64/pentium4/aorsmul_1.asm new file mode 100644 index 0000000..e5dbb34 --- /dev/null +++ b/gmp-6.3.0/mpn/x86_64/pentium4/aorsmul_1.asm @@ -0,0 +1,37 @@ +dnl X86-64 mpn_addmul_1 and mpn_submul_1 optimised for Intel Nocona. + +dnl Copyright 2018 Free Software Foundation, Inc. + +dnl This file is part of the GNU MP Library. +dnl +dnl The GNU MP Library is free software; you can redistribute it and/or modify +dnl it under the terms of either: +dnl +dnl * the GNU Lesser General Public License as published by the Free +dnl Software Foundation; either version 3 of the License, or (at your +dnl option) any later version. +dnl +dnl or +dnl +dnl * the GNU General Public License as published by the Free Software +dnl Foundation; either version 2 of the License, or (at your option) any +dnl later version. +dnl +dnl or both in parallel, as here. +dnl +dnl The GNU MP Library is distributed in the hope that it will be useful, but +dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +dnl for more details. +dnl +dnl You should have received copies of the GNU General Public License and the +dnl GNU Lesser General Public License along with the GNU MP Library. If not, +dnl see https://www.gnu.org/licenses/. + +include(`../config.m4') + +ABI_SUPPORT(DOS64) +ABI_SUPPORT(STD64) + +MULFUNC_PROLOGUE(mpn_addmul_1 mpn_submul_1) +include_mpn(`x86_64/bd1/aorsmul_1.asm') diff --git a/gmp-6.3.0/mpn/x86_64/pentium4/gmp-mparam.h b/gmp-6.3.0/mpn/x86_64/pentium4/gmp-mparam.h new file mode 100644 index 0000000..9c79310 --- /dev/null +++ b/gmp-6.3.0/mpn/x86_64/pentium4/gmp-mparam.h @@ -0,0 +1,257 @@ +/* Pentium 4-64 gmp-mparam.h -- Compiler/machine parameter header file. + +Copyright 2019 Free Software Foundation, Inc. + +This file is part of the GNU MP Library. + +The GNU MP Library is free software; you can redistribute it and/or modify +it under the terms of either: + + * the GNU Lesser General Public License as published by the Free + Software Foundation; either version 3 of the License, or (at your + option) any later version. + +or + + * the GNU General Public License as published by the Free Software + Foundation; either version 2 of the License, or (at your option) any + later version. + +or both in parallel, as here. + +The GNU MP Library is distributed in the hope that it will be useful, but +WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +You should have received copies of the GNU General Public License and the +GNU Lesser General Public License along with the GNU MP Library. If not, +see https://www.gnu.org/licenses/. */ + +#define GMP_LIMB_BITS 64 +#define GMP_LIMB_BYTES 8 + +/* These routines exists for all x86_64 chips, but they are slower on Pentium4 + than separate add/sub and shift. Make sure they are not really used. */ +#undef HAVE_NATIVE_mpn_rsblsh1_n +#undef HAVE_NATIVE_mpn_rsblsh2_n +#undef HAVE_NATIVE_mpn_addlsh_n +#undef HAVE_NATIVE_mpn_rsblsh_n + +/* 3400 MHz Pentium4 Nocona / 1024 Kibyte L2 cache */ +/* FFT tuning limit = 107,095,964 */ +/* Generated by tuneup.c, 2019-11-09, gcc 8.3 */ + +#define MOD_1_NORM_THRESHOLD 0 /* always */ +#define MOD_1_UNNORM_THRESHOLD 0 /* always */ +#define MOD_1N_TO_MOD_1_1_THRESHOLD 5 +#define MOD_1U_TO_MOD_1_1_THRESHOLD 3 +#define MOD_1_1_TO_MOD_1_2_THRESHOLD 14 +#define MOD_1_2_TO_MOD_1_4_THRESHOLD 32 +#define PREINV_MOD_1_TO_MOD_1_THRESHOLD 11 +#define USE_PREINV_DIVREM_1 1 /* native */ +#define DIV_QR_1_NORM_THRESHOLD 2 +#define DIV_QR_1_UNNORM_THRESHOLD MP_SIZE_T_MAX /* never */ +#define DIV_QR_2_PI2_THRESHOLD 12 +#define DIVEXACT_1_THRESHOLD 0 /* always (native) */ +#define BMOD_1_TO_MOD_1_THRESHOLD 20 + +#define DIV_1_VS_MUL_1_PERCENT 228 + +#define MUL_TOOM22_THRESHOLD 12 +#define MUL_TOOM33_THRESHOLD 81 +#define MUL_TOOM44_THRESHOLD 130 +#define MUL_TOOM6H_THRESHOLD 173 +#define MUL_TOOM8H_THRESHOLD 430 + +#define MUL_TOOM32_TO_TOOM43_THRESHOLD 81 +#define MUL_TOOM32_TO_TOOM53_THRESHOLD 91 +#define MUL_TOOM42_TO_TOOM53_THRESHOLD 89 +#define MUL_TOOM42_TO_TOOM63_THRESHOLD 88 +#define MUL_TOOM43_TO_TOOM54_THRESHOLD 112 + +#define SQR_BASECASE_THRESHOLD 0 /* always (native) */ +#define SQR_TOOM2_THRESHOLD 18 +#define SQR_TOOM3_THRESHOLD 113 +#define SQR_TOOM4_THRESHOLD 202 +#define SQR_TOOM6_THRESHOLD 238 +#define SQR_TOOM8_THRESHOLD 430 + +#define MULMID_TOOM42_THRESHOLD 20 + +#define MULMOD_BNM1_THRESHOLD 9 +#define SQRMOD_BNM1_THRESHOLD 11 + +#define MUL_FFT_MODF_THRESHOLD 236 /* k = 5 */ +#define MUL_FFT_TABLE3 \ + { { 236, 5}, { 11, 6}, { 6, 5}, { 13, 6}, \ + { 9, 5}, { 19, 6}, { 17, 7}, { 9, 6}, \ + { 19, 7}, { 10, 6}, { 21, 7}, { 11, 6}, \ + { 23, 7}, { 13, 8}, { 7, 7}, { 17, 8}, \ + { 9, 7}, { 21, 8}, { 11, 7}, { 23, 8}, \ + { 13, 9}, { 7, 8}, { 15, 7}, { 31, 8}, \ + { 21, 9}, { 11, 8}, { 27,10}, { 7, 9}, \ + { 15, 8}, { 33, 9}, { 19, 8}, { 39, 9}, \ + { 23, 8}, { 47, 9}, { 27,10}, { 15, 9}, \ + { 39,10}, { 23, 9}, { 51,11}, { 15,10}, \ + { 31, 9}, { 67,10}, { 39, 9}, { 83,10}, \ + { 47, 9}, { 95,10}, { 55,11}, { 31,10}, \ + { 63, 9}, { 127, 8}, { 255,10}, { 71, 9}, \ + { 143, 8}, { 287,10}, { 79,11}, { 47,10}, \ + { 95, 9}, { 191,12}, { 31,11}, { 63,10}, \ + { 127, 9}, { 255,10}, { 143, 9}, { 287,11}, \ + { 79,10}, { 159, 9}, { 319,10}, { 175,11}, \ + { 95,10}, { 191, 9}, { 383,10}, { 223,12}, \ + { 63,11}, { 127,10}, { 255,11}, { 143,10}, \ + { 287,11}, { 159,10}, { 319,11}, { 175,12}, \ + { 95,11}, { 191,10}, { 383,11}, { 223,13}, \ + { 63,12}, { 127,11}, { 255,10}, { 511,11}, \ + { 287,10}, { 575,12}, { 159,11}, { 351,12}, \ + { 191,11}, { 383,12}, { 223,11}, { 447,13}, \ + { 127,12}, { 255,11}, { 511,12}, { 287,11}, \ + { 575,10}, { 1151,12}, { 351,13}, { 191,12}, \ + { 415,11}, { 831,10}, { 1663,12}, { 447,14}, \ + { 127,13}, { 255,12}, { 511,11}, { 1023,12}, \ + { 543,11}, { 1087,10}, { 2175,12}, { 575,11}, \ + { 1151,13}, { 319,12}, { 639,11}, { 1279,12}, \ + { 671,11}, { 1343,12}, { 703,13}, { 383,12}, \ + { 767,11}, { 1535,12}, { 831,11}, { 1663,13}, \ + { 447,14}, { 255,13}, { 511,12}, { 1023,11}, \ + { 2047,12}, { 1087,11}, { 2175,13}, { 575,12}, \ + { 1151,11}, { 2303,12}, { 1215,11}, { 2431,10}, \ + { 4863,13}, { 639,12}, { 1279,11}, { 2559,12}, \ + { 1343,13}, { 703,14}, { 383,13}, { 767,12}, \ + { 1535,13}, { 831,12}, { 1663,15}, { 255,14}, \ + { 511,13}, { 1023,12}, { 2047,13}, { 1087,12}, \ + { 2175,13}, { 1151,12}, { 2303,13}, { 1215,12}, \ + { 2431,11}, { 4863,14}, { 639,13}, { 1279,12}, \ + { 2559,13}, { 1343,12}, { 2687,13}, { 1407,12}, \ + { 2815,13}, { 1471,14}, { 767,13}, { 1663,14}, \ + { 895,13}, { 1791,12}, { 3583,13}, { 1919,12}, \ + { 3839,15}, { 511,14}, { 1023,13}, { 2175,14}, \ + { 1151,13}, { 2303,12}, { 4607,13}, { 2431,12}, \ + { 4863,14}, { 1279,13}, { 2687,14}, { 1407,13}, \ + { 2815,15}, { 767,14}, { 1791,13}, { 3583,14}, \ + { 1919,13}, { 3839,16}, { 511,15}, { 1023,14}, \ + { 2175,13}, { 4351,14}, { 2303,13}, { 4607,14}, \ + { 2431,13}, { 4863,15}, { 1279,14}, { 2943,13}, \ + { 5887,15}, { 1535,14}, { 3199,15}, { 1791,14}, \ + { 3839,13}, { 7679,16}, { 1023,15}, { 2047,14}, \ + { 4351,15}, { 2303,14}, { 4863,15}, { 2815,14}, \ + { 5887,16}, { 1535,15}, { 3071,14}, { 6143,15}, \ + { 32768,16}, { 65536,17}, { 131072,18}, { 262144,19}, \ + { 524288,20}, {1048576,21}, {2097152,22}, {4194304,23}, \ + {8388608,24} } +#define MUL_FFT_TABLE3_SIZE 229 +#define MUL_FFT_THRESHOLD 2752 + +#define SQR_FFT_MODF_THRESHOLD 240 /* k = 5 */ +#define SQR_FFT_TABLE3 \ + { { 240, 5}, { 11, 6}, { 6, 5}, { 13, 6}, \ + { 9, 5}, { 19, 6}, { 17, 7}, { 9, 6}, \ + { 23, 7}, { 12, 6}, { 25, 7}, { 13, 8}, \ + { 7, 7}, { 17, 8}, { 9, 7}, { 21, 8}, \ + { 11, 7}, { 24, 8}, { 13, 9}, { 7, 8}, \ + { 15, 7}, { 31, 8}, { 21, 9}, { 11, 8}, \ + { 27,10}, { 7, 9}, { 15, 8}, { 33, 9}, \ + { 19, 8}, { 39, 9}, { 27,10}, { 15, 9}, \ + { 39,10}, { 23, 9}, { 47,11}, { 15,10}, \ + { 31, 9}, { 63,10}, { 39, 9}, { 79,10}, \ + { 55,11}, { 31,10}, { 63, 9}, { 127, 8}, \ + { 255,10}, { 71, 9}, { 143, 8}, { 287,10}, \ + { 79,11}, { 47,10}, { 95, 9}, { 191,12}, \ + { 31,11}, { 63,10}, { 127, 9}, { 255,10}, \ + { 143, 9}, { 287,11}, { 79,10}, { 159, 9}, \ + { 319,10}, { 175, 9}, { 351,11}, { 95,10}, \ + { 191, 9}, { 383,10}, { 207, 9}, { 415,10}, \ + { 223,12}, { 63,11}, { 127,10}, { 255,11}, \ + { 143,10}, { 287,11}, { 159,10}, { 319,11}, \ + { 175,10}, { 351,12}, { 95,11}, { 191,10}, \ + { 383,11}, { 207,10}, { 415,11}, { 223,13}, \ + { 63,12}, { 127,11}, { 255,10}, { 511,11}, \ + { 287,10}, { 575,12}, { 159,11}, { 319,10}, \ + { 639,11}, { 351,12}, { 191,11}, { 383,10}, \ + { 767,12}, { 223,11}, { 447,13}, { 127,12}, \ + { 255,11}, { 511,12}, { 287,11}, { 575,10}, \ + { 1151,12}, { 319,11}, { 639,12}, { 351,13}, \ + { 191,12}, { 383,11}, { 767,12}, { 415,11}, \ + { 831,12}, { 447,14}, { 127,13}, { 255,12}, \ + { 511,11}, { 1023,12}, { 543,11}, { 1087,12}, \ + { 575,11}, { 1151,13}, { 319,12}, { 639,11}, \ + { 1279,12}, { 671,11}, { 1343,13}, { 383,12}, \ + { 767,11}, { 1535,12}, { 831,13}, { 447,14}, \ + { 255,13}, { 511,12}, { 1023,11}, { 2047,12}, \ + { 1087,13}, { 575,12}, { 1151,11}, { 2303,12}, \ + { 1215,11}, { 2431,10}, { 4863,13}, { 639,12}, \ + { 1279,11}, { 2559,12}, { 1343,11}, { 2687,14}, \ + { 383,13}, { 767,12}, { 1535,13}, { 831,12}, \ + { 1663,15}, { 255,14}, { 511,13}, { 1023,12}, \ + { 2047,13}, { 1087,12}, { 2175,13}, { 1151,12}, \ + { 2303,13}, { 1215,12}, { 2431,11}, { 4863,14}, \ + { 639,13}, { 1279,12}, { 2559,13}, { 1343,12}, \ + { 2687,13}, { 1407,12}, { 2815,13}, { 1471,14}, \ + { 767,13}, { 1663,14}, { 895,13}, { 1791,12}, \ + { 3583,13}, { 1919,12}, { 3839,15}, { 511,14}, \ + { 1023,13}, { 2175,14}, { 1151,13}, { 2303,12}, \ + { 4607,13}, { 2431,12}, { 4863,14}, { 1279,13}, \ + { 2687,14}, { 1407,13}, { 2943,15}, { 767,14}, \ + { 1663,13}, { 3327,14}, { 1791,13}, { 3583,14}, \ + { 1919,13}, { 3839,16}, { 511,15}, { 1023,14}, \ + { 2175,13}, { 4351,14}, { 2303,13}, { 4607,14}, \ + { 2431,13}, { 4863,15}, { 1279,14}, { 2815,13}, \ + { 5631,14}, { 2943,13}, { 5887,15}, { 1535,14}, \ + { 3327,15}, { 1791,14}, { 3839,13}, { 7679,16}, \ + { 1023,15}, { 2047,14}, { 4351,15}, { 2303,14}, \ + { 4863,15}, { 2815,14}, { 5887,16}, { 1535,15}, \ + { 3071,14}, { 6143,15}, { 32768,16}, { 65536,17}, \ + { 131072,18}, { 262144,19}, { 524288,20}, {1048576,21}, \ + {2097152,22}, {4194304,23}, {8388608,24} } +#define SQR_FFT_TABLE3_SIZE 235 +#define SQR_FFT_THRESHOLD 2368 + +#define MULLO_BASECASE_THRESHOLD 0 /* always */ +#define MULLO_DC_THRESHOLD 45 +#define MULLO_MUL_N_THRESHOLD 5397 +#define SQRLO_BASECASE_THRESHOLD 6 +#define SQRLO_DC_THRESHOLD 46 +#define SQRLO_SQR_THRESHOLD 4658 + +#define DC_DIV_QR_THRESHOLD 36 +#define DC_DIVAPPR_Q_THRESHOLD 95 +#define DC_BDIV_QR_THRESHOLD 35 +#define DC_BDIV_Q_THRESHOLD 47 + +#define INV_MULMOD_BNM1_THRESHOLD 22 +#define INV_NEWTON_THRESHOLD 178 +#define INV_APPR_THRESHOLD 116 + +#define BINV_NEWTON_THRESHOLD 206 +#define REDC_1_TO_REDC_2_THRESHOLD 24 +#define REDC_2_TO_REDC_N_THRESHOLD 50 + +#define MU_DIV_QR_THRESHOLD 979 +#define MU_DIVAPPR_Q_THRESHOLD 979 +#define MUPI_DIV_QR_THRESHOLD 97 +#define MU_BDIV_QR_THRESHOLD 762 +#define MU_BDIV_Q_THRESHOLD 942 + +#define POWM_SEC_TABLE 7,34,114,523,1486 + +#define GET_STR_DC_THRESHOLD 13 +#define GET_STR_PRECOMPUTE_THRESHOLD 25 +#define SET_STR_DC_THRESHOLD 381 +#define SET_STR_PRECOMPUTE_THRESHOLD 1659 + +#define FAC_DSC_THRESHOLD 969 +#define FAC_ODD_THRESHOLD 0 /* always */ + +#define MATRIX22_STRASSEN_THRESHOLD 29 +#define HGCD2_DIV1_METHOD 3 /* 2.03% faster than 5 */ +#define HGCD_THRESHOLD 92 +#define HGCD_APPR_THRESHOLD 95 +#define HGCD_REDUCE_THRESHOLD 1815 +#define GCD_DC_THRESHOLD 195 +#define GCDEXT_DC_THRESHOLD 233 +#define JACOBI_BASE_METHOD 4 /* 17.06% faster than 1 */ + +/* Tuneup completed successfully, took 297016 seconds */ diff --git a/gmp-6.3.0/mpn/x86_64/pentium4/lshift.asm b/gmp-6.3.0/mpn/x86_64/pentium4/lshift.asm new file mode 100644 index 0000000..4037be4 --- /dev/null +++ b/gmp-6.3.0/mpn/x86_64/pentium4/lshift.asm @@ -0,0 +1,37 @@ +dnl X86-64 mpn_lshift optimised for Pentium 4. + +dnl Copyright 2018 Free Software Foundation, Inc. + +dnl This file is part of the GNU MP Library. +dnl +dnl The GNU MP Library is free software; you can redistribute it and/or modify +dnl it under the terms of either: +dnl +dnl * the GNU Lesser General Public License as published by the Free +dnl Software Foundation; either version 3 of the License, or (at your +dnl option) any later version. +dnl +dnl or +dnl +dnl * the GNU General Public License as published by the Free Software +dnl Foundation; either version 2 of the License, or (at your option) any +dnl later version. +dnl +dnl or both in parallel, as here. +dnl +dnl The GNU MP Library is distributed in the hope that it will be useful, but +dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +dnl for more details. +dnl +dnl You should have received copies of the GNU General Public License and the +dnl GNU Lesser General Public License along with the GNU MP Library. If not, +dnl see https://www.gnu.org/licenses/. + +include(`../config.m4') + +ABI_SUPPORT(DOS64) +ABI_SUPPORT(STD64) + +MULFUNC_PROLOGUE(mpn_lshift) +include_mpn(`x86_64/fastsse/lshift.asm') diff --git a/gmp-6.3.0/mpn/x86_64/pentium4/lshiftc.asm b/gmp-6.3.0/mpn/x86_64/pentium4/lshiftc.asm new file mode 100644 index 0000000..52856c1 --- /dev/null +++ b/gmp-6.3.0/mpn/x86_64/pentium4/lshiftc.asm @@ -0,0 +1,37 @@ +dnl X86-64 mpn_lshiftc optimised for Pentium 4. + +dnl Copyright 2018 Free Software Foundation, Inc. + +dnl This file is part of the GNU MP Library. +dnl +dnl The GNU MP Library is free software; you can redistribute it and/or modify +dnl it under the terms of either: +dnl +dnl * the GNU Lesser General Public License as published by the Free +dnl Software Foundation; either version 3 of the License, or (at your +dnl option) any later version. +dnl +dnl or +dnl +dnl * the GNU General Public License as published by the Free Software +dnl Foundation; either version 2 of the License, or (at your option) any +dnl later version. +dnl +dnl or both in parallel, as here. +dnl +dnl The GNU MP Library is distributed in the hope that it will be useful, but +dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +dnl for more details. +dnl +dnl You should have received copies of the GNU General Public License and the +dnl GNU Lesser General Public License along with the GNU MP Library. If not, +dnl see https://www.gnu.org/licenses/. + +include(`../config.m4') + +ABI_SUPPORT(DOS64) +ABI_SUPPORT(STD64) + +MULFUNC_PROLOGUE(mpn_lshiftc) +include_mpn(`x86_64/fastsse/lshiftc.asm') diff --git a/gmp-6.3.0/mpn/x86_64/pentium4/mod_34lsub1.asm b/gmp-6.3.0/mpn/x86_64/pentium4/mod_34lsub1.asm new file mode 100644 index 0000000..f34b3f0 --- /dev/null +++ b/gmp-6.3.0/mpn/x86_64/pentium4/mod_34lsub1.asm @@ -0,0 +1,167 @@ +dnl AMD64 mpn_mod_34lsub1 -- remainder modulo 2^48-1. + +dnl Copyright 2000-2002, 2004, 2005, 2007, 2010-2012 Free Software Foundation, +dnl Inc. + +dnl This file is part of the GNU MP Library. +dnl +dnl The GNU MP Library is free software; you can redistribute it and/or modify +dnl it under the terms of either: +dnl +dnl * the GNU Lesser General Public License as published by the Free +dnl Software Foundation; either version 3 of the License, or (at your +dnl option) any later version. +dnl +dnl or +dnl +dnl * the GNU General Public License as published by the Free Software +dnl Foundation; either version 2 of the License, or (at your option) any +dnl later version. +dnl +dnl or both in parallel, as here. +dnl +dnl The GNU MP Library is distributed in the hope that it will be useful, but +dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +dnl for more details. +dnl +dnl You should have received copies of the GNU General Public License and the +dnl GNU Lesser General Public License along with the GNU MP Library. If not, +dnl see https://www.gnu.org/licenses/. + +include(`../config.m4') + + +C cycles/limb +C AMD K8,K9 1.0 +C AMD K10 1.12 +C Intel P4 3.25 +C Intel core2 1.5 +C Intel corei 1.5 +C Intel atom 2.5 +C VIA nano 1.75 + + +C INPUT PARAMETERS +define(`ap', %rdi) +define(`n', %rsi) + +C mp_limb_t mpn_mod_34lsub1 (mp_srcptr up, mp_size_t n) + +C TODO +C * Review feed-in and wind-down code. In particular, try to avoid adc and +C sbb to placate Pentium4. +C * It seems possible to reach 2.67 c/l by using a cleaner 6-way unrolling, +C without the dual loop exits. + +ABI_SUPPORT(DOS64) +ABI_SUPPORT(STD64) + +ASM_START() + TEXT + ALIGN(32) +PROLOGUE(mpn_mod_34lsub1) + FUNC_ENTRY(2) + + mov $0x0000FFFFFFFFFFFF, %r11 + + sub $2, %rsi + ja L(gt2) + + mov (ap), %rax + nop + jb L(1) + + mov 8(ap), %rsi + mov %rax, %rdx + shr $48, %rax C src[0] low + + and %r11, %rdx C src[0] high + add %rdx, %rax + mov R32(%rsi), R32(%rdx) + + shr $32, %rsi C src[1] high + add %rsi, %rax + + shl $16, %rdx C src[1] low + add %rdx, %rax + +L(1): FUNC_EXIT() + ret + + + ALIGN(16) +L(gt2): xor R32(%rax), R32(%rax) + xor R32(%rcx), R32(%rcx) + xor R32(%rdx), R32(%rdx) + xor %r8, %r8 + xor %r9, %r9 + xor %r10, %r10 + +L(top): add (ap), %rax + adc $0, %r10 + add 8(ap), %rcx + adc $0, %r8 + add 16(ap), %rdx + adc $0, %r9 + + sub $3, %rsi + jng L(end) + + add 24(ap), %rax + adc $0, %r10 + add 32(ap), %rcx + adc $0, %r8 + add 40(ap), %rdx + lea 48(ap), ap + adc $0, %r9 + + sub $3, %rsi + jg L(top) + + + add $-24, ap +L(end): add %r9, %rax + adc %r10, %rcx + adc %r8, %rdx + + inc %rsi + mov $0x1, R32(%r10) + js L(combine) + + mov $0x10000, R32(%r10) + adc 24(ap), %rax + dec %rsi + js L(combine) + + adc 32(ap), %rcx + mov $0x100000000, %r10 + +L(combine): + sbb %rsi, %rsi C carry + mov %rax, %rdi C 0mod3 + shr $48, %rax C 0mod3 high + + and %r10, %rsi C carry masked + and %r11, %rdi C 0mod3 low + mov R32(%rcx), R32(%r10) C 1mod3 + + add %rsi, %rax C apply carry + shr $32, %rcx C 1mod3 high + + add %rdi, %rax C apply 0mod3 low + movzwl %dx, R32(%rdi) C 2mod3 + shl $16, %r10 C 1mod3 low + + add %rcx, %rax C apply 1mod3 high + shr $16, %rdx C 2mod3 high + + add %r10, %rax C apply 1mod3 low + shl $32, %rdi C 2mod3 low + + add %rdx, %rax C apply 2mod3 high + add %rdi, %rax C apply 2mod3 low + + FUNC_EXIT() + ret +EPILOGUE() diff --git a/gmp-6.3.0/mpn/x86_64/pentium4/mul_1.asm b/gmp-6.3.0/mpn/x86_64/pentium4/mul_1.asm new file mode 100644 index 0000000..70de670 --- /dev/null +++ b/gmp-6.3.0/mpn/x86_64/pentium4/mul_1.asm @@ -0,0 +1,37 @@ +dnl X86-64 mpn_mul_1 optimised for Intel Nocona. + +dnl Copyright 2018 Free Software Foundation, Inc. + +dnl This file is part of the GNU MP Library. +dnl +dnl The GNU MP Library is free software; you can redistribute it and/or modify +dnl it under the terms of either: +dnl +dnl * the GNU Lesser General Public License as published by the Free +dnl Software Foundation; either version 3 of the License, or (at your +dnl option) any later version. +dnl +dnl or +dnl +dnl * the GNU General Public License as published by the Free Software +dnl Foundation; either version 2 of the License, or (at your option) any +dnl later version. +dnl +dnl or both in parallel, as here. +dnl +dnl The GNU MP Library is distributed in the hope that it will be useful, but +dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +dnl for more details. +dnl +dnl You should have received copies of the GNU General Public License and the +dnl GNU Lesser General Public License along with the GNU MP Library. If not, +dnl see https://www.gnu.org/licenses/. + +include(`../config.m4') + +ABI_SUPPORT(DOS64) +ABI_SUPPORT(STD64) + +MULFUNC_PROLOGUE(mpn_mul_1 mpn_mul_1c) +include_mpn(`x86_64/bd1/mul_1.asm') diff --git a/gmp-6.3.0/mpn/x86_64/pentium4/mul_2.asm b/gmp-6.3.0/mpn/x86_64/pentium4/mul_2.asm new file mode 100644 index 0000000..a0f7302 --- /dev/null +++ b/gmp-6.3.0/mpn/x86_64/pentium4/mul_2.asm @@ -0,0 +1,37 @@ +dnl X86-64 mpn_mul_2 optimised for Intel Nocona. + +dnl Copyright 2018 Free Software Foundation, Inc. + +dnl This file is part of the GNU MP Library. +dnl +dnl The GNU MP Library is free software; you can redistribute it and/or modify +dnl it under the terms of either: +dnl +dnl * the GNU Lesser General Public License as published by the Free +dnl Software Foundation; either version 3 of the License, or (at your +dnl option) any later version. +dnl +dnl or +dnl +dnl * the GNU General Public License as published by the Free Software +dnl Foundation; either version 2 of the License, or (at your option) any +dnl later version. +dnl +dnl or both in parallel, as here. +dnl +dnl The GNU MP Library is distributed in the hope that it will be useful, but +dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +dnl for more details. +dnl +dnl You should have received copies of the GNU General Public License and the +dnl GNU Lesser General Public License along with the GNU MP Library. If not, +dnl see https://www.gnu.org/licenses/. + +include(`../config.m4') + +ABI_SUPPORT(DOS64) +ABI_SUPPORT(STD64) + +MULFUNC_PROLOGUE(mpn_mul_2) +include_mpn(`x86_64/bd1/mul_2.asm') diff --git a/gmp-6.3.0/mpn/x86_64/pentium4/mul_basecase.asm b/gmp-6.3.0/mpn/x86_64/pentium4/mul_basecase.asm new file mode 100644 index 0000000..fb16029 --- /dev/null +++ b/gmp-6.3.0/mpn/x86_64/pentium4/mul_basecase.asm @@ -0,0 +1,37 @@ +dnl X86-64 mpn_mul_basecase optimised for Intel Nocona. + +dnl Copyright 2018 Free Software Foundation, Inc. + +dnl This file is part of the GNU MP Library. +dnl +dnl The GNU MP Library is free software; you can redistribute it and/or modify +dnl it under the terms of either: +dnl +dnl * the GNU Lesser General Public License as published by the Free +dnl Software Foundation; either version 3 of the License, or (at your +dnl option) any later version. +dnl +dnl or +dnl +dnl * the GNU General Public License as published by the Free Software +dnl Foundation; either version 2 of the License, or (at your option) any +dnl later version. +dnl +dnl or both in parallel, as here. +dnl +dnl The GNU MP Library is distributed in the hope that it will be useful, but +dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +dnl for more details. +dnl +dnl You should have received copies of the GNU General Public License and the +dnl GNU Lesser General Public License along with the GNU MP Library. If not, +dnl see https://www.gnu.org/licenses/. + +include(`../config.m4') + +ABI_SUPPORT(DOS64) +ABI_SUPPORT(STD64) + +MULFUNC_PROLOGUE(mpn_mul_basecase) +include_mpn(`x86_64/core2/mul_basecase.asm') diff --git a/gmp-6.3.0/mpn/x86_64/pentium4/mullo_basecase.asm b/gmp-6.3.0/mpn/x86_64/pentium4/mullo_basecase.asm new file mode 100644 index 0000000..b9e08a8 --- /dev/null +++ b/gmp-6.3.0/mpn/x86_64/pentium4/mullo_basecase.asm @@ -0,0 +1,37 @@ +dnl X86-64 mpn_mullo_basecase optimised for Intel Nocona. + +dnl Copyright 2018 Free Software Foundation, Inc. + +dnl This file is part of the GNU MP Library. +dnl +dnl The GNU MP Library is free software; you can redistribute it and/or modify +dnl it under the terms of either: +dnl +dnl * the GNU Lesser General Public License as published by the Free +dnl Software Foundation; either version 3 of the License, or (at your +dnl option) any later version. +dnl +dnl or +dnl +dnl * the GNU General Public License as published by the Free Software +dnl Foundation; either version 2 of the License, or (at your option) any +dnl later version. +dnl +dnl or both in parallel, as here. +dnl +dnl The GNU MP Library is distributed in the hope that it will be useful, but +dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +dnl for more details. +dnl +dnl You should have received copies of the GNU General Public License and the +dnl GNU Lesser General Public License along with the GNU MP Library. If not, +dnl see https://www.gnu.org/licenses/. + +include(`../config.m4') + +ABI_SUPPORT(DOS64) +ABI_SUPPORT(STD64) + +MULFUNC_PROLOGUE(mpn_mullo_basecase) +include_mpn(`x86_64/core2/mullo_basecase.asm') diff --git a/gmp-6.3.0/mpn/x86_64/pentium4/popcount.asm b/gmp-6.3.0/mpn/x86_64/pentium4/popcount.asm new file mode 100644 index 0000000..7014b39 --- /dev/null +++ b/gmp-6.3.0/mpn/x86_64/pentium4/popcount.asm @@ -0,0 +1,35 @@ +dnl x86-64 mpn_popcount optimized for Pentium 4. + +dnl Copyright 2007 Free Software Foundation, Inc. + +dnl This file is part of the GNU MP Library. +dnl +dnl The GNU MP Library is free software; you can redistribute it and/or modify +dnl it under the terms of either: +dnl +dnl * the GNU Lesser General Public License as published by the Free +dnl Software Foundation; either version 3 of the License, or (at your +dnl option) any later version. +dnl +dnl or +dnl +dnl * the GNU General Public License as published by the Free Software +dnl Foundation; either version 2 of the License, or (at your option) any +dnl later version. +dnl +dnl or both in parallel, as here. +dnl +dnl The GNU MP Library is distributed in the hope that it will be useful, but +dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +dnl for more details. +dnl +dnl You should have received copies of the GNU General Public License and the +dnl GNU Lesser General Public License along with the GNU MP Library. If not, +dnl see https://www.gnu.org/licenses/. + + +include(`../config.m4') + +MULFUNC_PROLOGUE(mpn_popcount) +include_mpn(`x86/pentium4/sse2/popcount.asm') diff --git a/gmp-6.3.0/mpn/x86_64/pentium4/redc_1.asm b/gmp-6.3.0/mpn/x86_64/pentium4/redc_1.asm new file mode 100644 index 0000000..00e380d --- /dev/null +++ b/gmp-6.3.0/mpn/x86_64/pentium4/redc_1.asm @@ -0,0 +1,37 @@ +dnl X86-64 mpn_redc_1 optimised for Intel Nocona. + +dnl Copyright 2018 Free Software Foundation, Inc. + +dnl This file is part of the GNU MP Library. +dnl +dnl The GNU MP Library is free software; you can redistribute it and/or modify +dnl it under the terms of either: +dnl +dnl * the GNU Lesser General Public License as published by the Free +dnl Software Foundation; either version 3 of the License, or (at your +dnl option) any later version. +dnl +dnl or +dnl +dnl * the GNU General Public License as published by the Free Software +dnl Foundation; either version 2 of the License, or (at your option) any +dnl later version. +dnl +dnl or both in parallel, as here. +dnl +dnl The GNU MP Library is distributed in the hope that it will be useful, but +dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +dnl for more details. +dnl +dnl You should have received copies of the GNU General Public License and the +dnl GNU Lesser General Public License along with the GNU MP Library. If not, +dnl see https://www.gnu.org/licenses/. + +include(`../config.m4') + +ABI_SUPPORT(DOS64) +ABI_SUPPORT(STD64) + +MULFUNC_PROLOGUE(mpn_redc_1) +include_mpn(`x86_64/bt1/redc_1.asm') diff --git a/gmp-6.3.0/mpn/x86_64/pentium4/rsh1aors_n.asm b/gmp-6.3.0/mpn/x86_64/pentium4/rsh1aors_n.asm new file mode 100644 index 0000000..5528ce4 --- /dev/null +++ b/gmp-6.3.0/mpn/x86_64/pentium4/rsh1aors_n.asm @@ -0,0 +1,334 @@ +dnl x86-64 mpn_rsh1add_n/mpn_rsh1sub_n optimized for Pentium 4. + +dnl Contributed to the GNU project by Torbjorn Granlund. + +dnl Copyright 2007, 2008, 2010-2012 Free Software Foundation, Inc. + +dnl This file is part of the GNU MP Library. +dnl +dnl The GNU MP Library is free software; you can redistribute it and/or modify +dnl it under the terms of either: +dnl +dnl * the GNU Lesser General Public License as published by the Free +dnl Software Foundation; either version 3 of the License, or (at your +dnl option) any later version. +dnl +dnl or +dnl +dnl * the GNU General Public License as published by the Free Software +dnl Foundation; either version 2 of the License, or (at your option) any +dnl later version. +dnl +dnl or both in parallel, as here. +dnl +dnl The GNU MP Library is distributed in the hope that it will be useful, but +dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +dnl for more details. +dnl +dnl You should have received copies of the GNU General Public License and the +dnl GNU Lesser General Public License along with the GNU MP Library. If not, +dnl see https://www.gnu.org/licenses/. + +include(`../config.m4') + + +C cycles/limb +C AMD K8,K9 4.13 +C AMD K10 4.13 +C Intel P4 5.70 +C Intel core2 4.75 +C Intel corei 5 +C Intel atom 8.75 +C VIA nano 5.25 + +C TODO +C * Try to make this smaller, 746 bytes seem excessive for this 2nd class +C function. Less sw pipelining would help, and since we now probably +C pipeline somewhat too deeply, it might not affect performance too much. +C * A separate small-n loop might speed things as well as make things smaller. +C That loop should be selected before pushing registers. + +C INPUT PARAMETERS +define(`rp', `%rdi') +define(`up', `%rsi') +define(`vp', `%rdx') +define(`n', `%rcx') +define(`cy', `%r8') + +ifdef(`OPERATION_rsh1add_n', ` + define(ADDSUB, add) + define(func, mpn_rsh1add_n) + define(func_nc, mpn_rsh1add_nc)') +ifdef(`OPERATION_rsh1sub_n', ` + define(ADDSUB, sub) + define(func, mpn_rsh1sub_n) + define(func_nc, mpn_rsh1sub_nc)') + +ABI_SUPPORT(DOS64) +ABI_SUPPORT(STD64) + +MULFUNC_PROLOGUE(mpn_rsh1add_n mpn_rsh1add_nc mpn_rsh1sub_n mpn_rsh1sub_nc) + +ASM_START() + TEXT +PROLOGUE(func) + FUNC_ENTRY(4) + xor %r8, %r8 +IFDOS(` jmp L(ent) ') +EPILOGUE() +PROLOGUE(func_nc) + FUNC_ENTRY(4) +IFDOS(` mov 56(%rsp), %r8 ') +L(ent): push %rbx + push %r12 + push %r13 + push %r14 + push %r15 + + mov (vp), %r9 + mov (up), %r15 + + mov R32(n), R32(%rax) + and $3, R32(%rax) + jne L(n00) + + mov R32(%r8), R32(%rbx) C n = 0, 4, 8, ... + mov 8(up), %r10 + ADDSUB %r9, %r15 + mov 8(vp), %r9 + setc R8(%rax) + ADDSUB %rbx, %r15 C return bit + jnc 1f + mov $1, R8(%rax) +1: mov 16(up), %r12 + ADDSUB %r9, %r10 + mov 16(vp), %r9 + setc R8(%rbx) + mov %r15, %r13 + ADDSUB %rax, %r10 + jnc 1f + mov $1, R8(%rbx) +1: mov 24(up), %r11 + ADDSUB %r9, %r12 + lea 32(up), up + mov 24(vp), %r9 + lea 32(vp), vp + setc R8(%rax) + mov %r10, %r14 + shl $63, %r10 + shr %r13 + jmp L(L00) + +L(n00): cmp $2, R32(%rax) + jnc L(n01) + xor R32(%rbx), R32(%rbx) C n = 1, 5, 9, ... + lea -24(rp), rp + mov R32(%r8), R32(%rax) + dec n + jnz L(gt1) + ADDSUB %r9, %r15 + setc R8(%rbx) + ADDSUB %rax, %r15 + jnc 1f + mov $1, R8(%rbx) +1: mov %r15, %r14 + shl $63, %rbx + shr %r14 + jmp L(cj1) +L(gt1): mov 8(up), %r8 + ADDSUB %r9, %r15 + mov 8(vp), %r9 + setc R8(%rbx) + ADDSUB %rax, %r15 + jnc 1f + mov $1, R8(%rbx) +1: mov 16(up), %r10 + ADDSUB %r9, %r8 + mov 16(vp), %r9 + setc R8(%rax) + mov %r15, %r14 + ADDSUB %rbx, %r8 + jnc 1f + mov $1, R8(%rax) +1: mov 24(up), %r12 + ADDSUB %r9, %r10 + mov 24(vp), %r9 + setc R8(%rbx) + mov %r8, %r13 + shl $63, %r8 + shr %r14 + lea 8(up), up + lea 8(vp), vp + jmp L(L01) + +L(n01): jne L(n10) + lea -16(rp), rp C n = 2, 6, 10, ... + mov R32(%r8), R32(%rbx) + mov 8(up), %r11 + ADDSUB %r9, %r15 + mov 8(vp), %r9 + setc R8(%rax) + ADDSUB %rbx, %r15 + jnc 1f + mov $1, R8(%rax) +1: sub $2, n + jnz L(gt2) + ADDSUB %r9, %r11 + setc R8(%rbx) + mov %r15, %r13 + ADDSUB %rax, %r11 + jnc 1f + mov $1, R8(%rbx) +1: mov %r11, %r14 + shl $63, %r11 + shr %r13 + jmp L(cj2) +L(gt2): mov 16(up), %r8 + ADDSUB %r9, %r11 + mov 16(vp), %r9 + setc R8(%rbx) + mov %r15, %r13 + ADDSUB %rax, %r11 + jnc 1f + mov $1, R8(%rbx) +1: mov 24(up), %r10 + ADDSUB %r9, %r8 + mov 24(vp), %r9 + setc R8(%rax) + mov %r11, %r14 + shl $63, %r11 + shr %r13 + lea 16(up), up + lea 16(vp), vp + jmp L(L10) + +L(n10): xor R32(%rbx), R32(%rbx) C n = 3, 7, 11, ... + lea -8(rp), rp + mov R32(%r8), R32(%rax) + mov 8(up), %r12 + ADDSUB %r9, %r15 + mov 8(vp), %r9 + setc R8(%rbx) + ADDSUB %rax, %r15 + jnc 1f + mov $1, R8(%rbx) +1: mov 16(up), %r11 + ADDSUB %r9, %r12 + mov 16(vp), %r9 + setc R8(%rax) + mov %r15, %r14 + ADDSUB %rbx, %r12 + jnc 1f + mov $1, R8(%rax) +1: sub $3, n + jnz L(gt3) + ADDSUB %r9, %r11 + setc R8(%rbx) + mov %r12, %r13 + shl $63, %r12 + shr %r14 + jmp L(cj3) +L(gt3): mov 24(up), %r8 + ADDSUB %r9, %r11 + mov 24(vp), %r9 + setc R8(%rbx) + mov %r12, %r13 + shl $63, %r12 + shr %r14 + lea 24(up), up + lea 24(vp), vp + jmp L(L11) + +L(c0): mov $1, R8(%rbx) + jmp L(rc0) +L(c1): mov $1, R8(%rax) + jmp L(rc1) +L(c2): mov $1, R8(%rbx) + jmp L(rc2) + + ALIGN(16) +L(top): mov (up), %r8 C not on critical path + or %r13, %r10 + ADDSUB %r9, %r11 C not on critical path + mov (vp), %r9 C not on critical path + setc R8(%rbx) C save carry out + mov %r12, %r13 C new for later + shl $63, %r12 C shift new right + shr %r14 C shift old left + mov %r10, (rp) +L(L11): ADDSUB %rax, %r11 C apply previous carry out + jc L(c0) C jump if ripple +L(rc0): mov 8(up), %r10 + or %r14, %r12 + ADDSUB %r9, %r8 + mov 8(vp), %r9 + setc R8(%rax) + mov %r11, %r14 + shl $63, %r11 + shr %r13 + mov %r12, 8(rp) +L(L10): ADDSUB %rbx, %r8 + jc L(c1) +L(rc1): mov 16(up), %r12 + or %r13, %r11 + ADDSUB %r9, %r10 + mov 16(vp), %r9 + setc R8(%rbx) + mov %r8, %r13 + shl $63, %r8 + shr %r14 + mov %r11, 16(rp) +L(L01): ADDSUB %rax, %r10 + jc L(c2) +L(rc2): mov 24(up), %r11 + or %r14, %r8 + ADDSUB %r9, %r12 + lea 32(up), up + mov 24(vp), %r9 + lea 32(vp), vp + setc R8(%rax) + mov %r10, %r14 + shl $63, %r10 + shr %r13 + mov %r8, 24(rp) + lea 32(rp), rp +L(L00): ADDSUB %rbx, %r12 + jc L(c3) +L(rc3): sub $4, n + ja L(top) + +L(end): or %r13, %r10 + ADDSUB %r9, %r11 + setc R8(%rbx) + mov %r12, %r13 + shl $63, %r12 + shr %r14 + mov %r10, (rp) +L(cj3): ADDSUB %rax, %r11 + jnc 1f + mov $1, R8(%rbx) +1: or %r14, %r12 + mov %r11, %r14 + shl $63, %r11 + shr %r13 + mov %r12, 8(rp) +L(cj2): or %r13, %r11 + shl $63, %rbx + shr %r14 + mov %r11, 16(rp) +L(cj1): or %r14, %rbx + mov %rbx, 24(rp) + + mov R32(%r15), R32(%rax) + and $1, R32(%rax) + pop %r15 + pop %r14 + pop %r13 + pop %r12 + pop %rbx + FUNC_EXIT() + ret +L(c3): mov $1, R8(%rax) + jmp L(rc3) +EPILOGUE() diff --git a/gmp-6.3.0/mpn/x86_64/pentium4/rshift.asm b/gmp-6.3.0/mpn/x86_64/pentium4/rshift.asm new file mode 100644 index 0000000..b7c1ee2 --- /dev/null +++ b/gmp-6.3.0/mpn/x86_64/pentium4/rshift.asm @@ -0,0 +1,169 @@ +dnl x86-64 mpn_rshift optimized for Pentium 4. + +dnl Copyright 2003, 2005, 2007, 2008, 2012 Free Software Foundation, Inc. + +dnl This file is part of the GNU MP Library. +dnl +dnl The GNU MP Library is free software; you can redistribute it and/or modify +dnl it under the terms of either: +dnl +dnl * the GNU Lesser General Public License as published by the Free +dnl Software Foundation; either version 3 of the License, or (at your +dnl option) any later version. +dnl +dnl or +dnl +dnl * the GNU General Public License as published by the Free Software +dnl Foundation; either version 2 of the License, or (at your option) any +dnl later version. +dnl +dnl or both in parallel, as here. +dnl +dnl The GNU MP Library is distributed in the hope that it will be useful, but +dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +dnl for more details. +dnl +dnl You should have received copies of the GNU General Public License and the +dnl GNU Lesser General Public License along with the GNU MP Library. If not, +dnl see https://www.gnu.org/licenses/. + +include(`../config.m4') + + +C cycles/limb +C AMD K8,K9 2.5 +C AMD K10 ? +C Intel P4 3.29 +C Intel core2 2.1 (fluctuates, presumably cache related) +C Intel corei ? +C Intel atom 14.3 +C VIA nano ? + +C INPUT PARAMETERS +define(`rp',`%rdi') +define(`up',`%rsi') +define(`n',`%rdx') +define(`cnt',`%cl') + +ABI_SUPPORT(DOS64) +ABI_SUPPORT(STD64) + +ASM_START() + TEXT + ALIGN(32) +PROLOGUE(mpn_rshift) + FUNC_ENTRY(4) + mov (up), %rax + movd R32(%rcx), %mm4 + neg R32(%rcx) C put lsh count in cl + and $63, R32(%rcx) + movd R32(%rcx), %mm5 + + lea -8(up,n,8), up + lea -8(rp,n,8), rp + lea 1(n), R32(%r8) + neg n + + shl R8(%rcx), %rax C function return value + + and $3, R32(%r8) + je L(rol) C jump for n = 3, 7, 11, ... + + dec R32(%r8) + jne L(1) +C n = 4, 8, 12, ... + movq 8(up,n,8), %mm2 + psrlq %mm4, %mm2 + movq 16(up,n,8), %mm0 + psllq %mm5, %mm0 + por %mm0, %mm2 + movq %mm2, 8(rp,n,8) + inc n + jmp L(rol) + +L(1): dec R32(%r8) + je L(1x) C jump for n = 1, 5, 9, 13, ... +C n = 2, 6, 10, 16, ... + movq 8(up,n,8), %mm2 + psrlq %mm4, %mm2 + movq 16(up,n,8), %mm0 + psllq %mm5, %mm0 + por %mm0, %mm2 + movq %mm2, 8(rp,n,8) + inc n +L(1x): + cmp $-1, n + je L(ast) + movq 8(up,n,8), %mm2 + psrlq %mm4, %mm2 + movq 16(up,n,8), %mm3 + psrlq %mm4, %mm3 + movq 16(up,n,8), %mm0 + movq 24(up,n,8), %mm1 + psllq %mm5, %mm0 + por %mm0, %mm2 + psllq %mm5, %mm1 + por %mm1, %mm3 + movq %mm2, 8(rp,n,8) + movq %mm3, 16(rp,n,8) + add $2, n + +L(rol): movq 8(up,n,8), %mm2 + psrlq %mm4, %mm2 + movq 16(up,n,8), %mm3 + psrlq %mm4, %mm3 + + add $4, n C 4 + jb L(end) C 2 + ALIGN(32) +L(top): + C finish stuff from lsh block + movq -16(up,n,8), %mm0 + movq -8(up,n,8), %mm1 + psllq %mm5, %mm0 + por %mm0, %mm2 + psllq %mm5, %mm1 + movq (up,n,8), %mm0 + por %mm1, %mm3 + movq 8(up,n,8), %mm1 + movq %mm2, -24(rp,n,8) + movq %mm3, -16(rp,n,8) + C start two new rsh + psllq %mm5, %mm0 + psllq %mm5, %mm1 + + C finish stuff from rsh block + movq -8(up,n,8), %mm2 + movq (up,n,8), %mm3 + psrlq %mm4, %mm2 + por %mm2, %mm0 + psrlq %mm4, %mm3 + movq 8(up,n,8), %mm2 + por %mm3, %mm1 + movq 16(up,n,8), %mm3 + movq %mm0, -8(rp,n,8) + movq %mm1, (rp,n,8) + C start two new lsh + add $4, n + psrlq %mm4, %mm2 + psrlq %mm4, %mm3 + + jae L(top) C 2 +L(end): + movq -8(up), %mm0 + psllq %mm5, %mm0 + por %mm0, %mm2 + movq (up), %mm1 + psllq %mm5, %mm1 + por %mm1, %mm3 + movq %mm2, -16(rp) + movq %mm3, -8(rp) + +L(ast): movq (up), %mm2 + psrlq %mm4, %mm2 + movq %mm2, (rp) + emms + FUNC_EXIT() + ret +EPILOGUE() diff --git a/gmp-6.3.0/mpn/x86_64/pentium4/sec_tabselect.asm b/gmp-6.3.0/mpn/x86_64/pentium4/sec_tabselect.asm new file mode 100644 index 0000000..e436034 --- /dev/null +++ b/gmp-6.3.0/mpn/x86_64/pentium4/sec_tabselect.asm @@ -0,0 +1,37 @@ +dnl X86-64 mpn_sec_tabselect. + +dnl Copyright 2012, 2013 Free Software Foundation, Inc. + +dnl This file is part of the GNU MP Library. +dnl +dnl The GNU MP Library is free software; you can redistribute it and/or modify +dnl it under the terms of either: +dnl +dnl * the GNU Lesser General Public License as published by the Free +dnl Software Foundation; either version 3 of the License, or (at your +dnl option) any later version. +dnl +dnl or +dnl +dnl * the GNU General Public License as published by the Free Software +dnl Foundation; either version 2 of the License, or (at your option) any +dnl later version. +dnl +dnl or both in parallel, as here. +dnl +dnl The GNU MP Library is distributed in the hope that it will be useful, but +dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +dnl for more details. +dnl +dnl You should have received copies of the GNU General Public License and the +dnl GNU Lesser General Public License along with the GNU MP Library. If not, +dnl see https://www.gnu.org/licenses/. + +include(`../config.m4') + +ABI_SUPPORT(DOS64) +ABI_SUPPORT(STD64) + +MULFUNC_PROLOGUE(mpn_sec_tabselect) +include_mpn(`x86_64/fastsse/sec_tabselect.asm') diff --git a/gmp-6.3.0/mpn/x86_64/pentium4/sqr_basecase.asm b/gmp-6.3.0/mpn/x86_64/pentium4/sqr_basecase.asm new file mode 100644 index 0000000..9725287 --- /dev/null +++ b/gmp-6.3.0/mpn/x86_64/pentium4/sqr_basecase.asm @@ -0,0 +1,37 @@ +dnl X86-64 mpn_sqr_basecase optimised for Intel Nocona. + +dnl Copyright 2018 Free Software Foundation, Inc. + +dnl This file is part of the GNU MP Library. +dnl +dnl The GNU MP Library is free software; you can redistribute it and/or modify +dnl it under the terms of either: +dnl +dnl * the GNU Lesser General Public License as published by the Free +dnl Software Foundation; either version 3 of the License, or (at your +dnl option) any later version. +dnl +dnl or +dnl +dnl * the GNU General Public License as published by the Free Software +dnl Foundation; either version 2 of the License, or (at your option) any +dnl later version. +dnl +dnl or both in parallel, as here. +dnl +dnl The GNU MP Library is distributed in the hope that it will be useful, but +dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +dnl for more details. +dnl +dnl You should have received copies of the GNU General Public License and the +dnl GNU Lesser General Public License along with the GNU MP Library. If not, +dnl see https://www.gnu.org/licenses/. + +include(`../config.m4') + +ABI_SUPPORT(DOS64) +ABI_SUPPORT(STD64) + +MULFUNC_PROLOGUE(mpn_sqr_basecase) +include_mpn(`x86_64/core2/sqr_basecase.asm') |