diff options
Diffstat (limited to 'gmp-6.3.0/mpn/x86/fat')
| -rw-r--r-- | gmp-6.3.0/mpn/x86/fat/com.c | 32 | ||||
| -rw-r--r-- | gmp-6.3.0/mpn/x86/fat/fat.c | 530 | ||||
| -rw-r--r-- | gmp-6.3.0/mpn/x86/fat/fat_entry.asm | 243 | ||||
| -rw-r--r-- | gmp-6.3.0/mpn/x86/fat/gmp-mparam.h | 71 | ||||
| -rw-r--r-- | gmp-6.3.0/mpn/x86/fat/lshiftc.c | 32 | ||||
| -rw-r--r-- | gmp-6.3.0/mpn/x86/fat/mod_1.c | 32 | ||||
| -rw-r--r-- | gmp-6.3.0/mpn/x86/fat/mod_1_1.c | 36 | ||||
| -rw-r--r-- | gmp-6.3.0/mpn/x86/fat/mod_1_2.c | 36 | ||||
| -rw-r--r-- | gmp-6.3.0/mpn/x86/fat/mod_1_4.c | 36 | ||||
| -rw-r--r-- | gmp-6.3.0/mpn/x86/fat/mode1o.c | 32 | ||||
| -rw-r--r-- | gmp-6.3.0/mpn/x86/fat/mullo_basecase.c | 32 | ||||
| -rw-r--r-- | gmp-6.3.0/mpn/x86/fat/redc_1.c | 32 | ||||
| -rw-r--r-- | gmp-6.3.0/mpn/x86/fat/redc_2.c | 32 |
13 files changed, 1176 insertions, 0 deletions
diff --git a/gmp-6.3.0/mpn/x86/fat/com.c b/gmp-6.3.0/mpn/x86/fat/com.c new file mode 100644 index 0000000..d359d4c --- /dev/null +++ b/gmp-6.3.0/mpn/x86/fat/com.c @@ -0,0 +1,32 @@ +/* Fat binary fallback mpn_com. + +Copyright 2003, 2009, 2011 Free Software Foundation, Inc. + +This file is part of the GNU MP Library. + +The GNU MP Library is free software; you can redistribute it and/or modify +it under the terms of either: + + * the GNU Lesser General Public License as published by the Free + Software Foundation; either version 3 of the License, or (at your + option) any later version. + +or + + * the GNU General Public License as published by the Free Software + Foundation; either version 2 of the License, or (at your option) any + later version. + +or both in parallel, as here. + +The GNU MP Library is distributed in the hope that it will be useful, but +WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +You should have received copies of the GNU General Public License and the +GNU Lesser General Public License along with the GNU MP Library. If not, +see https://www.gnu.org/licenses/. */ + + +#include "mpn/generic/com.c" diff --git a/gmp-6.3.0/mpn/x86/fat/fat.c b/gmp-6.3.0/mpn/x86/fat/fat.c new file mode 100644 index 0000000..4c8cf3c --- /dev/null +++ b/gmp-6.3.0/mpn/x86/fat/fat.c @@ -0,0 +1,530 @@ +/* x86 fat binary initializers. + + THE FUNCTIONS AND VARIABLES IN THIS FILE ARE FOR INTERNAL USE ONLY. + THEY'RE ALMOST CERTAIN TO BE SUBJECT TO INCOMPATIBLE CHANGES OR DISAPPEAR + COMPLETELY IN FUTURE GNU MP RELEASES. + +Copyright 2003, 2004, 2011-2013, 2015, 2017, 2018 Free Software Foundation, +Inc. + +This file is part of the GNU MP Library. + +The GNU MP Library is free software; you can redistribute it and/or modify +it under the terms of either: + + * the GNU Lesser General Public License as published by the Free + Software Foundation; either version 3 of the License, or (at your + option) any later version. + +or + + * the GNU General Public License as published by the Free Software + Foundation; either version 2 of the License, or (at your option) any + later version. + +or both in parallel, as here. + +The GNU MP Library is distributed in the hope that it will be useful, but +WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +You should have received copies of the GNU General Public License and the +GNU Lesser General Public License along with the GNU MP Library. If not, +see https://www.gnu.org/licenses/. */ + +#include <stdio.h> /* for printf */ +#include <stdlib.h> /* for getenv */ +#include <string.h> + +#include "gmp-impl.h" + +/* Change this to "#define TRACE(x) x" for some traces. */ +#define TRACE(x) + + +/* fat_entry.asm */ +long __gmpn_cpuid (char [12], int); +int __gmpn_cpuid_available (void); + + +#if WANT_FAKE_CPUID +/* The "name"s in the table are values for the GMP_CPU_TYPE environment + variable. Anything can be used, but for now it's the canonical cpu types + as per config.guess/config.sub. */ + +#define __gmpn_cpuid fake_cpuid +#define __gmpn_cpuid_available fake_cpuid_available + +#define MAKE_FMS(family, model) \ + ((((family) & 0xf) << 8) + (((family) & 0xff0) << 20) \ + + (((model) & 0xf) << 4) + (((model) & 0xf0) << 12)) + +static struct { + const char *name; + const char *vendor; + unsigned fms; +} fake_cpuid_table[] = { + { "i386", "" }, + { "i486", "GenuineIntel", MAKE_FMS (4, 0) }, + { "pentium", "GenuineIntel", MAKE_FMS (5, 0) }, + { "pentiummmx", "GenuineIntel", MAKE_FMS (5, 4) }, + { "pentiumpro", "GenuineIntel", MAKE_FMS (6, 0) }, + { "pentium2", "GenuineIntel", MAKE_FMS (6, 2) }, + { "pentium3", "GenuineIntel", MAKE_FMS (6, 7) }, + { "pentium4", "GenuineIntel", MAKE_FMS (15, 2) }, + { "prescott", "GenuineIntel", MAKE_FMS (15, 3) }, + { "nocona", "GenuineIntel", MAKE_FMS (15, 4) }, + { "core2", "GenuineIntel", MAKE_FMS (6, 0xf) }, + { "nehalem", "GenuineIntel", MAKE_FMS (6, 0x1a) }, + { "nhm", "GenuineIntel", MAKE_FMS (6, 0x1a) }, + { "atom", "GenuineIntel", MAKE_FMS (6, 0x1c) }, + { "westmere", "GenuineIntel", MAKE_FMS (6, 0x25) }, + { "wsm", "GenuineIntel", MAKE_FMS (6, 0x25) }, + { "sandybridge","GenuineIntel", MAKE_FMS (6, 0x2a) }, + { "sbr", "GenuineIntel", MAKE_FMS (6, 0x2a) }, + { "silvermont", "GenuineIntel", MAKE_FMS (6, 0x37) }, + { "slm", "GenuineIntel", MAKE_FMS (6, 0x37) }, + { "haswell", "GenuineIntel", MAKE_FMS (6, 0x3c) }, + { "hwl", "GenuineIntel", MAKE_FMS (6, 0x3c) }, + { "broadwell", "GenuineIntel", MAKE_FMS (6, 0x3d) }, + { "bwl", "GenuineIntel", MAKE_FMS (6, 0x3d) }, + { "skylake", "GenuineIntel", MAKE_FMS (6, 0x5e) }, + { "sky", "GenuineIntel", MAKE_FMS (6, 0x5e) }, + + { "k5", "AuthenticAMD", MAKE_FMS (5, 0) }, + { "k6", "AuthenticAMD", MAKE_FMS (5, 3) }, + { "k62", "AuthenticAMD", MAKE_FMS (5, 8) }, + { "k63", "AuthenticAMD", MAKE_FMS (5, 9) }, + { "athlon", "AuthenticAMD", MAKE_FMS (6, 0) }, + { "k8", "AuthenticAMD", MAKE_FMS (15, 0) }, + { "k10", "AuthenticAMD", MAKE_FMS (16, 0) }, + { "bobcat", "AuthenticAMD", MAKE_FMS (20, 1) }, + { "bulldozer", "AuthenticAMD", MAKE_FMS (21, 1) }, + { "piledriver", "AuthenticAMD", MAKE_FMS (21, 2) }, + { "steamroller","AuthenticAMD", MAKE_FMS (21, 0x30) }, + { "excavator", "AuthenticAMD", MAKE_FMS (21, 0x60) }, + { "jaguar", "AuthenticAMD", MAKE_FMS (22, 1) }, + { "zen", "AuthenticAMD", MAKE_FMS (23, 1) }, + + { "viac3", "CentaurHauls", MAKE_FMS (6, 0) }, + { "viac32", "CentaurHauls", MAKE_FMS (6, 9) }, + { "nano", "CentaurHauls", MAKE_FMS (6, 15) }, +}; + +static int +fake_cpuid_lookup (void) +{ + char *s; + int i; + + s = getenv ("GMP_CPU_TYPE"); + if (s == NULL) + { + printf ("Need GMP_CPU_TYPE environment variable for fake cpuid\n"); + abort (); + } + + for (i = 0; i < numberof (fake_cpuid_table); i++) + if (strcmp (s, fake_cpuid_table[i].name) == 0) + return i; + + printf ("GMP_CPU_TYPE=%s unknown\n", s); + abort (); +} + +static int +fake_cpuid_available (void) +{ + return fake_cpuid_table[fake_cpuid_lookup()].vendor[0] != '\0'; +} + +static long +fake_cpuid (char dst[12], int id) +{ + int i = fake_cpuid_lookup(); + + switch (id) { + case 0: + memcpy (dst, fake_cpuid_table[i].vendor, 12); + return 0; + case 1: + return fake_cpuid_table[i].fms; + default: + printf ("fake_cpuid(): oops, unknown id %d\n", id); + abort (); + } +} +#endif + + +typedef DECL_preinv_divrem_1 ((*preinv_divrem_1_t)); +typedef DECL_preinv_mod_1 ((*preinv_mod_1_t)); + +struct cpuvec_t __gmpn_cpuvec = { + __MPN(add_n_init), + 0, + 0, + __MPN(addmul_1_init), + 0, + __MPN(bdiv_dbm1c_init), + __MPN(cnd_add_n_init), + __MPN(cnd_sub_n_init), + __MPN(com_init), + __MPN(copyd_init), + __MPN(copyi_init), + __MPN(divexact_1_init), + __MPN(divrem_1_init), + __MPN(gcd_11_init), + __MPN(lshift_init), + __MPN(lshiftc_init), + __MPN(mod_1_init), + __MPN(mod_1_1p_init), + __MPN(mod_1_1p_cps_init), + __MPN(mod_1s_2p_init), + __MPN(mod_1s_2p_cps_init), + __MPN(mod_1s_4p_init), + __MPN(mod_1s_4p_cps_init), + __MPN(mod_34lsub1_init), + __MPN(modexact_1c_odd_init), + __MPN(mul_1_init), + __MPN(mul_basecase_init), + __MPN(mullo_basecase_init), + __MPN(preinv_divrem_1_init), + __MPN(preinv_mod_1_init), + __MPN(redc_1_init), + __MPN(redc_2_init), + __MPN(rshift_init), + __MPN(sqr_basecase_init), + __MPN(sub_n_init), + 0, + __MPN(submul_1_init), + 0 +}; + +int __gmpn_cpuvec_initialized = 0; + +/* The following setups start with generic x86, then overwrite with + specifics for a chip, and higher versions of that chip. + + The arrangement of the setups here will normally be the same as the $path + selections in configure.in for the respective chips. + + This code is reentrant and thread safe. We always calculate the same + decided_cpuvec, so if two copies of the code are running it doesn't + matter which completes first, both write the same to __gmpn_cpuvec. + + We need to go via decided_cpuvec because if one thread has completed + __gmpn_cpuvec then it may be making use of the threshold values in that + vector. If another thread is still running __gmpn_cpuvec_init then we + don't want it to write different values to those fields since some of the + asm routines only operate correctly up to their own defined threshold, + not an arbitrary value. */ + +void +__gmpn_cpuvec_init (void) +{ + struct cpuvec_t decided_cpuvec; + + TRACE (printf ("__gmpn_cpuvec_init:\n")); + + memset (&decided_cpuvec, '\0', sizeof (decided_cpuvec)); + + CPUVEC_SETUP_x86; + CPUVEC_SETUP_fat; + + if (! __gmpn_cpuid_available ()) + { + TRACE (printf (" 80386, or early 80486 without cpuid\n")); + } + else + { + char vendor_string[13]; + char dummy_string[12]; + long fms; + int family, model; + + __gmpn_cpuid (vendor_string, 0); + vendor_string[12] = 0; + + fms = __gmpn_cpuid (dummy_string, 1); + family = ((fms >> 8) & 0xf) + ((fms >> 20) & 0xff); + model = ((fms >> 4) & 0xf) + ((fms >> 12) & 0xf0); + + if (strcmp (vendor_string, "GenuineIntel") == 0) + { + switch (family) + { + case 4: + TRACE (printf (" 80486 with cpuid\n")); + break; + + case 5: + TRACE (printf (" pentium\n")); + CPUVEC_SETUP_pentium; + if (model == 4 || model == 8) + { + TRACE (printf (" pentiummmx\n")); + CPUVEC_SETUP_pentium_mmx; + } + break; + + case 6: + TRACE (printf (" p6\n")); + CPUVEC_SETUP_p6; + switch (model) + { + case 0x00: + case 0x01: + TRACE (printf (" pentiumpro\n")); + break; + + case 0x02: + case 0x03: + case 0x04: + case 0x05: + case 0x06: + TRACE (printf (" pentium2\n")); + CPUVEC_SETUP_p6_mmx; + break; + + case 0x07: + case 0x08: + case 0x0a: + case 0x0b: + case 0x0c: + TRACE (printf (" pentium3\n")); + CPUVEC_SETUP_p6_mmx; + CPUVEC_SETUP_p6_p3mmx; + break; + + case 0x09: /* Banias */ + case 0x0d: /* Dothan */ + case 0x0e: /* Yonah */ + TRACE (printf (" Banias/Dothan/Yonah\n")); + CPUVEC_SETUP_p6_mmx; + CPUVEC_SETUP_p6_p3mmx; + CPUVEC_SETUP_p6_sse2; + break; + + case 0x0f: /* Conroe Merom Kentsfield Allendale */ + case 0x10: + case 0x11: + case 0x12: + case 0x13: + case 0x14: + case 0x15: + case 0x16: + case 0x17: /* PNR Wolfdale Yorkfield */ + case 0x18: + case 0x19: + case 0x1d: /* PNR Dunnington */ + TRACE (printf (" Conroe\n")); + CPUVEC_SETUP_p6_mmx; + CPUVEC_SETUP_p6_p3mmx; + CPUVEC_SETUP_p6_sse2; + CPUVEC_SETUP_core2; + break; + + case 0x1c: /* Atom Silverthorne */ + case 0x26: /* Atom Lincroft */ + case 0x27: /* Atom Saltwell */ + case 0x36: /* Atom Cedarview/Saltwell */ + TRACE (printf (" atom\n")); + CPUVEC_SETUP_atom; + CPUVEC_SETUP_atom_mmx; + CPUVEC_SETUP_atom_sse2; + break; + + case 0x37: /* Silvermont */ + case 0x4a: /* Silvermont */ + case 0x4c: /* Airmont */ + case 0x4d: /* Silvermont/Avoton */ + case 0x5a: /* Silvermont */ + TRACE (printf (" silvermont\n")); + CPUVEC_SETUP_atom; + CPUVEC_SETUP_atom_mmx; + CPUVEC_SETUP_atom_sse2; + CPUVEC_SETUP_silvermont; + break; + + case 0x5c: /* Goldmont */ + case 0x5f: /* Goldmont */ + case 0x7a: /* Goldmont Plus */ + TRACE (printf (" goldmont\n")); + CPUVEC_SETUP_atom; + CPUVEC_SETUP_atom_mmx; + CPUVEC_SETUP_atom_sse2; + CPUVEC_SETUP_goldmont; + break; + + case 0x1a: /* NHM Gainestown */ + case 0x1b: + case 0x1e: /* NHM Lynnfield/Jasper */ + case 0x1f: + case 0x20: + case 0x21: + case 0x22: + case 0x23: + case 0x24: + case 0x25: /* WSM Clarkdale/Arrandale */ + case 0x28: + case 0x29: + case 0x2b: + case 0x2c: /* WSM Gulftown */ + case 0x2e: /* NHM Beckton */ + case 0x2f: /* WSM Eagleton */ + TRACE (printf (" nehalem/westmere\n")); + CPUVEC_SETUP_p6_mmx; + CPUVEC_SETUP_p6_p3mmx; + CPUVEC_SETUP_p6_sse2; + CPUVEC_SETUP_core2; + CPUVEC_SETUP_coreinhm; + break; + + case 0x2a: /* SBR */ + case 0x2d: /* SBR-EP */ + case 0x3a: /* IBR */ + case 0x3e: /* IBR Ivytown */ + case 0x3c: /* Haswell client */ + case 0x3f: /* Haswell server */ + case 0x45: /* Haswell ULT */ + case 0x46: /* Crystal Well */ + case 0x3d: /* Broadwell */ + case 0x47: /* Broadwell */ + case 0x4f: /* Broadwell server */ + case 0x56: /* Broadwell microserver */ + case 0x4e: /* Skylake client */ + case 0x55: /* Skylake server */ + case 0x5e: /* Skylake */ + case 0x8e: /* Kabylake */ + case 0x9e: /* Kabylake */ + TRACE (printf (" sandybridge\n")); + CPUVEC_SETUP_p6_mmx; + CPUVEC_SETUP_p6_p3mmx; + CPUVEC_SETUP_p6_sse2; + CPUVEC_SETUP_core2; + CPUVEC_SETUP_coreinhm; + CPUVEC_SETUP_coreisbr; + break; + } + break; + + case 15: + TRACE (printf (" pentium4\n")); + CPUVEC_SETUP_pentium4; + CPUVEC_SETUP_pentium4_mmx; + CPUVEC_SETUP_pentium4_sse2; + break; + } + } + else if (strcmp (vendor_string, "AuthenticAMD") == 0) + { + switch (family) + { + case 5: + if (model <= 3) + { + TRACE (printf (" k5\n")); + } + else + { + TRACE (printf (" k6\n")); + CPUVEC_SETUP_k6; + CPUVEC_SETUP_k6_mmx; + if (model >= 8) + { + TRACE (printf (" k62\n")); + CPUVEC_SETUP_k6_k62mmx; + } + if (model >= 9) + { + TRACE (printf (" k63\n")); + } + } + break; + case 6: + TRACE (printf (" athlon\n")); + CPUVEC_SETUP_k7; + CPUVEC_SETUP_k7_mmx; + break; + + case 0x0f: /* k8 */ + case 0x11: /* "fam 11h", mix of k8 and k10 */ + case 0x13: /* unknown, conservatively assume k8 */ + TRACE (printf (" k8\n")); + CPUVEC_SETUP_k7; + CPUVEC_SETUP_k7_mmx; + CPUVEC_SETUP_k8; + break; + + case 0x10: /* k10 */ + case 0x12: /* k10 (llano) */ + TRACE (printf (" k10\n")); + CPUVEC_SETUP_k7; + CPUVEC_SETUP_k7_mmx; + break; + + case 0x14: /* bobcat */ + case 0x16: /* jaguar */ + TRACE (printf (" bobcat\n")); + CPUVEC_SETUP_k7; + CPUVEC_SETUP_k7_mmx; + CPUVEC_SETUP_bt1; + break; + + case 0x15: /* bulldozer */ + TRACE (printf (" bulldozer\n")); + CPUVEC_SETUP_k7; + CPUVEC_SETUP_k7_mmx; + CPUVEC_SETUP_bd1; + break; + + case 0x17: /* zen */ + case 0x19: /* zen3 */ + TRACE (printf (" zen\n")); + CPUVEC_SETUP_k7; + CPUVEC_SETUP_k7_mmx; + break; + } + } + else if (strcmp (vendor_string, "CentaurHauls") == 0) + { + switch (family) + { + case 6: + TRACE (printf (" viac3\n")); + if (model >= 9) + { + TRACE (printf (" viac32\n")); + } + if (model >= 15) + { + TRACE (printf (" nano\n")); + CPUVEC_SETUP_nano; + } + break; + } + } + else if (strcmp (vendor_string, "CyrixInstead") == 0) + { + /* Should recognize Cyrix' processors too. */ + TRACE (printf (" cyrix something\n")); + } + } + + /* There's no x86 generic mpn_preinv_divrem_1 or mpn_preinv_mod_1. + Instead default to the plain versions from whichever CPU we detected. + The function arguments are compatible, no need for any glue code. */ + if (decided_cpuvec.preinv_divrem_1 == NULL) + decided_cpuvec.preinv_divrem_1 =(preinv_divrem_1_t)decided_cpuvec.divrem_1; + if (decided_cpuvec.preinv_mod_1 == NULL) + decided_cpuvec.preinv_mod_1 =(preinv_mod_1_t) decided_cpuvec.mod_1; + + ASSERT_CPUVEC (decided_cpuvec); + CPUVEC_INSTALL (decided_cpuvec); + + /* Set this once the threshold fields are ready. + Use volatile to prevent it getting moved. */ + *((volatile int *) &__gmpn_cpuvec_initialized) = 1; +} diff --git a/gmp-6.3.0/mpn/x86/fat/fat_entry.asm b/gmp-6.3.0/mpn/x86/fat/fat_entry.asm new file mode 100644 index 0000000..25655cf --- /dev/null +++ b/gmp-6.3.0/mpn/x86/fat/fat_entry.asm @@ -0,0 +1,243 @@ +dnl x86 fat binary entrypoints. + +dnl Copyright 2003, 2012, 2014 Free Software Foundation, Inc. + +dnl This file is part of the GNU MP Library. +dnl +dnl The GNU MP Library is free software; you can redistribute it and/or modify +dnl it under the terms of either: +dnl +dnl * the GNU Lesser General Public License as published by the Free +dnl Software Foundation; either version 3 of the License, or (at your +dnl option) any later version. +dnl +dnl or +dnl +dnl * the GNU General Public License as published by the Free Software +dnl Foundation; either version 2 of the License, or (at your option) any +dnl later version. +dnl +dnl or both in parallel, as here. +dnl +dnl The GNU MP Library is distributed in the hope that it will be useful, but +dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +dnl for more details. +dnl +dnl You should have received copies of the GNU General Public License and the +dnl GNU Lesser General Public License along with the GNU MP Library. If not, +dnl see https://www.gnu.org/licenses/. + +include(`../config.m4') + + +dnl Forcibly disable profiling. +dnl +dnl The entrypoints and inits are small enough not to worry about, the real +dnl routines arrived at will have any profiling. Also, the way the code +dnl here ends with a jump means we won't work properly with the +dnl "instrument" profiling scheme anyway. + +define(`WANT_PROFILING',no) + + + TEXT + + +dnl Usage: FAT_ENTRY(name, offset) +dnl +dnl Emit a fat binary entrypoint function of the given name. This is the +dnl normal entry for applications, eg. __gmpn_add_n. +dnl +dnl The code simply jumps through the function pointer in __gmpn_cpuvec at +dnl the given "offset" (in bytes). +dnl +dnl For non-PIC, the jumps are 5 bytes each, aligning them to 8 should be +dnl fine for all x86s. +dnl +dnl For PIC, the jumps are 20 bytes each, and are best aligned to 16 to +dnl ensure at least the first two instructions don't cross a cache line +dnl boundary. +dnl +dnl Note the extra `' ahead of PROLOGUE obscures it from the HAVE_NATIVE +dnl grepping in configure, stopping that code trying to eval something with +dnl $1 in it. + +define(FAT_ENTRY, +m4_assert_numargs(2) +` ALIGN(ifdef(`PIC',16,8)) +`'PROLOGUE($1)dnl +ifdef(`PIC',`dnl +ifdef(`DARWIN',` + call L(movl_eip_edx) + movl L(___gmpn_cpuvec)$non_lazy_ptr-.(%edx), %edx + jmp *m4_empty_if_zero($2)(%edx) +',`dnl + call L(movl_eip_edx) +L(entry_here$2): + addl $_GLOBAL_OFFSET_TABLE_+[.-L(entry_here$2)], %edx + movl GSYM_PREFIX`'__gmpn_cpuvec@GOT(%edx), %edx + jmp *m4_empty_if_zero($2)(%edx) +') +',`dnl non-PIC + jmp *GSYM_PREFIX`'__gmpn_cpuvec+$2 +') +EPILOGUE() +') + + +dnl FAT_ENTRY for each CPUVEC_FUNCS_LIST +dnl + +define(`CPUVEC_offset',0) +foreach(i, +`FAT_ENTRY(MPN(i),CPUVEC_offset) +define(`CPUVEC_offset',eval(CPUVEC_offset + 4))', +CPUVEC_FUNCS_LIST) + +ifdef(`PIC',` + ALIGN(8) +L(movl_eip_edx): + movl (%esp), %edx + ret_internal +ifdef(`DARWIN',` + .section __IMPORT,__pointers,non_lazy_symbol_pointers +L(___gmpn_cpuvec)$non_lazy_ptr: + .indirect_symbol ___gmpn_cpuvec + .long 0 + TEXT +') +') + + +dnl Usage: FAT_INIT(name, offset) +dnl +dnl Emit a fat binary initializer function of the given name. These +dnl functions are the initial values for the pointers in __gmpn_cpuvec. +dnl +dnl The code simply calls __gmpn_cpuvec_init, and then jumps back through +dnl the __gmpn_cpuvec pointer, at the given "offset" (in bytes). +dnl __gmpn_cpuvec_init will have stored the address of the selected +dnl implementation there. +dnl +dnl Only one of these routines will be executed, and only once, since after +dnl that all the __gmpn_cpuvec pointers go to real routines. So there's no +dnl need for anything special here, just something small and simple. To +dnl keep code size down, "fat_init" is a shared bit of code, arrived at +dnl with the offset in %al. %al is used since the movb instruction is 2 +dnl bytes where %eax would be 4. +dnl +dnl Note having `PROLOGUE in FAT_INIT obscures that PROLOGUE from the +dnl HAVE_NATIVE grepping in configure, preventing that code trying to eval +dnl something with $1 in it. + +define(FAT_INIT, +m4_assert_numargs(2) +`PROLOGUE($1)dnl + movb $`'$2, %al + jmp L(fat_init) +EPILOGUE() +') + +L(fat_init): + C al __gmpn_cpuvec byte offset + + movzbl %al, %eax + pushl %eax + +ifdef(`PIC',`dnl +ifdef(`DARWIN',` + sub $8, %esp + CALL( __gmpn_cpuvec_init) + add $8, %esp + call L(movl_eip_edx) + movl L(___gmpn_cpuvec)$non_lazy_ptr-.(%edx), %edx +',`dnl + pushl %ebx + call L(movl_eip_ebx) +L(init_here): + addl $_GLOBAL_OFFSET_TABLE_+[.-L(init_here)], %ebx + CALL( __gmpn_cpuvec_init) + movl GSYM_PREFIX`'__gmpn_cpuvec@GOT(%ebx), %edx + popl %ebx +') + popl %eax + jmp *(%edx,%eax) + +L(movl_eip_ebx): + movl (%esp), %ebx + ret_internal +',`dnl non-PIC + sub $8, %esp C needed on Darwin, harmless elsewhere + CALL( __gmpn_cpuvec_init) + add $8, %esp C needed on Darwin, harmless elsewhere + popl %eax + jmp *GSYM_PREFIX`'__gmpn_cpuvec(%eax) +') + +dnl FAT_INIT for each CPUVEC_FUNCS_LIST +dnl + +define(`CPUVEC_offset',0) +foreach(i, +`FAT_INIT(MPN(i`'_init),CPUVEC_offset) +define(`CPUVEC_offset',eval(CPUVEC_offset + 4))', +CPUVEC_FUNCS_LIST) + + + +C long __gmpn_cpuid (char dst[12], int id); +C +C This is called only once, so just something simple and compact is fine. + +defframe(PARAM_ID, 8) +defframe(PARAM_DST, 4) +deflit(`FRAME',0) + +PROLOGUE(__gmpn_cpuid) + pushl %esi FRAME_pushl() + pushl %ebx FRAME_pushl() + movl PARAM_ID, %eax + cpuid + movl PARAM_DST, %esi + movl %ebx, (%esi) + movl %edx, 4(%esi) + movl %ecx, 8(%esi) + popl %ebx + popl %esi + ret +EPILOGUE() + + +C int __gmpn_cpuid_available (void); +C +C Return non-zero if the cpuid instruction is available, which means late +C model 80486 and higher. 80386 and early 80486 don't have cpuid. +C +C The test follows Intel AP-485 application note, namely that if bit 21 is +C modifiable then cpuid is supported. This test is reentrant and thread +C safe, since of course any interrupt or context switch will preserve the +C flags while we're tinkering with them. +C +C This is called only once, so just something simple and compact is fine. + +PROLOGUE(__gmpn_cpuid_available) + pushf + popl %ecx C old flags + + movl %ecx, %edx + xorl $0x200000, %edx + pushl %edx + popf + pushf + popl %edx C tweaked flags + + movl $1, %eax + cmpl %ecx, %edx + jne L(available) + xorl %eax, %eax C not changed, so cpuid not available + +L(available): + ret +EPILOGUE() +ASM_END() diff --git a/gmp-6.3.0/mpn/x86/fat/gmp-mparam.h b/gmp-6.3.0/mpn/x86/fat/gmp-mparam.h new file mode 100644 index 0000000..3641a6b --- /dev/null +++ b/gmp-6.3.0/mpn/x86/fat/gmp-mparam.h @@ -0,0 +1,71 @@ +/* Fat binary x86 gmp-mparam.h -- Compiler/machine parameter header file. + +Copyright 1991, 1993, 1994, 2000-2003, 2011 Free Software Foundation, Inc. + +This file is part of the GNU MP Library. + +The GNU MP Library is free software; you can redistribute it and/or modify +it under the terms of either: + + * the GNU Lesser General Public License as published by the Free + Software Foundation; either version 3 of the License, or (at your + option) any later version. + +or + + * the GNU General Public License as published by the Free Software + Foundation; either version 2 of the License, or (at your option) any + later version. + +or both in parallel, as here. + +The GNU MP Library is distributed in the hope that it will be useful, but +WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +You should have received copies of the GNU General Public License and the +GNU Lesser General Public License along with the GNU MP Library. If not, +see https://www.gnu.org/licenses/. */ + +#define GMP_LIMB_BITS 32 +#define GMP_LIMB_BYTES 4 + + +/* mpn_divexact_1 is faster than mpn_divrem_1 at all sizes. The only time + this might not be true currently is for actual 80386 and 80486 chips, + where mpn/x86/dive_1.asm might be slower than mpn/x86/divrem_1.asm, but + that's not worth worrying about. */ +#define DIVEXACT_1_THRESHOLD 0 + +/* Only some of the x86s have an mpn_preinv_divrem_1, but we set + USE_PREINV_DIVREM_1 so that all callers use it, and then let the + __gmpn_cpuvec pointer go to plain mpn_divrem_1 if there's not an actual + preinv. */ +#define USE_PREINV_DIVREM_1 1 + +#define BMOD_1_TO_MOD_1_THRESHOLD 20 + +/* mpn_sqr_basecase is faster than mpn_mul_basecase at all sizes, no need + for mpn_sqr to call the latter. */ +#define SQR_BASECASE_THRESHOLD 0 + +/* Sensible fallbacks for these, when not taken from a cpu-specific + gmp-mparam.h. */ +#define MUL_TOOM22_THRESHOLD 20 +#define MUL_TOOM33_THRESHOLD 130 +#define SQR_TOOM2_THRESHOLD 30 +#define SQR_TOOM3_THRESHOLD 200 + +/* These are values more or less in the middle of what the typical x86 chips + come out as. For a fat binary it's necessary to have values for these, + since the defaults for MUL_FFT_TABLE and SQR_FFT_TABLE otherwise come out + as non-constant array initializers. FIXME: Perhaps these should be done + in the cpuvec structure like other thresholds. */ +#define MUL_FFT_TABLE { 464, 928, 1920, 3584, 10240, 40960, 0 } +#define MUL_FFT_MODF_THRESHOLD 400 +#define MUL_FFT_THRESHOLD 2000 + +#define SQR_FFT_TABLE { 528, 1184, 1920, 4608, 14336, 40960, 0 } +#define SQR_FFT_MODF_THRESHOLD 500 +#define SQR_FFT_THRESHOLD 3000 diff --git a/gmp-6.3.0/mpn/x86/fat/lshiftc.c b/gmp-6.3.0/mpn/x86/fat/lshiftc.c new file mode 100644 index 0000000..9ecf489 --- /dev/null +++ b/gmp-6.3.0/mpn/x86/fat/lshiftc.c @@ -0,0 +1,32 @@ +/* Fat binary fallback mpn_lshiftc. + +Copyright 2003, 2009, 2011 Free Software Foundation, Inc. + +This file is part of the GNU MP Library. + +The GNU MP Library is free software; you can redistribute it and/or modify +it under the terms of either: + + * the GNU Lesser General Public License as published by the Free + Software Foundation; either version 3 of the License, or (at your + option) any later version. + +or + + * the GNU General Public License as published by the Free Software + Foundation; either version 2 of the License, or (at your option) any + later version. + +or both in parallel, as here. + +The GNU MP Library is distributed in the hope that it will be useful, but +WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +You should have received copies of the GNU General Public License and the +GNU Lesser General Public License along with the GNU MP Library. If not, +see https://www.gnu.org/licenses/. */ + + +#include "mpn/generic/lshiftc.c" diff --git a/gmp-6.3.0/mpn/x86/fat/mod_1.c b/gmp-6.3.0/mpn/x86/fat/mod_1.c new file mode 100644 index 0000000..4f149cc --- /dev/null +++ b/gmp-6.3.0/mpn/x86/fat/mod_1.c @@ -0,0 +1,32 @@ +/* Fat binary fallback mpn_mod_1. + +Copyright 2003, 2009 Free Software Foundation, Inc. + +This file is part of the GNU MP Library. + +The GNU MP Library is free software; you can redistribute it and/or modify +it under the terms of either: + + * the GNU Lesser General Public License as published by the Free + Software Foundation; either version 3 of the License, or (at your + option) any later version. + +or + + * the GNU General Public License as published by the Free Software + Foundation; either version 2 of the License, or (at your option) any + later version. + +or both in parallel, as here. + +The GNU MP Library is distributed in the hope that it will be useful, but +WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +You should have received copies of the GNU General Public License and the +GNU Lesser General Public License along with the GNU MP Library. If not, +see https://www.gnu.org/licenses/. */ + + +#include "mpn/generic/mod_1.c" diff --git a/gmp-6.3.0/mpn/x86/fat/mod_1_1.c b/gmp-6.3.0/mpn/x86/fat/mod_1_1.c new file mode 100644 index 0000000..92eaa7a --- /dev/null +++ b/gmp-6.3.0/mpn/x86/fat/mod_1_1.c @@ -0,0 +1,36 @@ +/* Fat binary fallback mpn_mod_1_1p. + +Copyright 2003, 2009, 2011 Free Software Foundation, Inc. + +This file is part of the GNU MP Library. + +The GNU MP Library is free software; you can redistribute it and/or modify +it under the terms of either: + + * the GNU Lesser General Public License as published by the Free + Software Foundation; either version 3 of the License, or (at your + option) any later version. + +or + + * the GNU General Public License as published by the Free Software + Foundation; either version 2 of the License, or (at your option) any + later version. + +or both in parallel, as here. + +The GNU MP Library is distributed in the hope that it will be useful, but +WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +You should have received copies of the GNU General Public License and the +GNU Lesser General Public License along with the GNU MP Library. If not, +see https://www.gnu.org/licenses/. */ + +/* +PROLOGUE(mpn_mod_1_1p_cps) +*/ + +#define OPERATION_mod_1_1_cps 1 +#include "mpn/generic/mod_1_1.c" diff --git a/gmp-6.3.0/mpn/x86/fat/mod_1_2.c b/gmp-6.3.0/mpn/x86/fat/mod_1_2.c new file mode 100644 index 0000000..9095a61 --- /dev/null +++ b/gmp-6.3.0/mpn/x86/fat/mod_1_2.c @@ -0,0 +1,36 @@ +/* Fat binary fallback mpn_mod_1s_2p. + +Copyright 2003, 2009, 2011 Free Software Foundation, Inc. + +This file is part of the GNU MP Library. + +The GNU MP Library is free software; you can redistribute it and/or modify +it under the terms of either: + + * the GNU Lesser General Public License as published by the Free + Software Foundation; either version 3 of the License, or (at your + option) any later version. + +or + + * the GNU General Public License as published by the Free Software + Foundation; either version 2 of the License, or (at your option) any + later version. + +or both in parallel, as here. + +The GNU MP Library is distributed in the hope that it will be useful, but +WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +You should have received copies of the GNU General Public License and the +GNU Lesser General Public License along with the GNU MP Library. If not, +see https://www.gnu.org/licenses/. */ + +/* +PROLOGUE(mpn_mod_1s_2p_cps) +*/ + +#define OPERATION_mod_1_2_cps 1 +#include "mpn/generic/mod_1_2.c" diff --git a/gmp-6.3.0/mpn/x86/fat/mod_1_4.c b/gmp-6.3.0/mpn/x86/fat/mod_1_4.c new file mode 100644 index 0000000..51c0def --- /dev/null +++ b/gmp-6.3.0/mpn/x86/fat/mod_1_4.c @@ -0,0 +1,36 @@ +/* Fat binary fallback mpn_mod_1s_4p. + +Copyright 2003, 2009, 2011 Free Software Foundation, Inc. + +This file is part of the GNU MP Library. + +The GNU MP Library is free software; you can redistribute it and/or modify +it under the terms of either: + + * the GNU Lesser General Public License as published by the Free + Software Foundation; either version 3 of the License, or (at your + option) any later version. + +or + + * the GNU General Public License as published by the Free Software + Foundation; either version 2 of the License, or (at your option) any + later version. + +or both in parallel, as here. + +The GNU MP Library is distributed in the hope that it will be useful, but +WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +You should have received copies of the GNU General Public License and the +GNU Lesser General Public License along with the GNU MP Library. If not, +see https://www.gnu.org/licenses/. */ + +/* +PROLOGUE(mpn_mod_1s_4p_cps) +*/ + +#define OPERATION_mod_1_4_cps 1 +#include "mpn/generic/mod_1_4.c" diff --git a/gmp-6.3.0/mpn/x86/fat/mode1o.c b/gmp-6.3.0/mpn/x86/fat/mode1o.c new file mode 100644 index 0000000..870ddb8 --- /dev/null +++ b/gmp-6.3.0/mpn/x86/fat/mode1o.c @@ -0,0 +1,32 @@ +/* Fat binary fallback mpn_modexact_1c_odd. + +Copyright 2003 Free Software Foundation, Inc. + +This file is part of the GNU MP Library. + +The GNU MP Library is free software; you can redistribute it and/or modify +it under the terms of either: + + * the GNU Lesser General Public License as published by the Free + Software Foundation; either version 3 of the License, or (at your + option) any later version. + +or + + * the GNU General Public License as published by the Free Software + Foundation; either version 2 of the License, or (at your option) any + later version. + +or both in parallel, as here. + +The GNU MP Library is distributed in the hope that it will be useful, but +WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +You should have received copies of the GNU General Public License and the +GNU Lesser General Public License along with the GNU MP Library. If not, +see https://www.gnu.org/licenses/. */ + + +#include "mpn/generic/mode1o.c" diff --git a/gmp-6.3.0/mpn/x86/fat/mullo_basecase.c b/gmp-6.3.0/mpn/x86/fat/mullo_basecase.c new file mode 100644 index 0000000..7f86be6 --- /dev/null +++ b/gmp-6.3.0/mpn/x86/fat/mullo_basecase.c @@ -0,0 +1,32 @@ +/* Fat binary fallback mpn_mullo_basecase. + +Copyright 2012 Free Software Foundation, Inc. + +This file is part of the GNU MP Library. + +The GNU MP Library is free software; you can redistribute it and/or modify +it under the terms of either: + + * the GNU Lesser General Public License as published by the Free + Software Foundation; either version 3 of the License, or (at your + option) any later version. + +or + + * the GNU General Public License as published by the Free Software + Foundation; either version 2 of the License, or (at your option) any + later version. + +or both in parallel, as here. + +The GNU MP Library is distributed in the hope that it will be useful, but +WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +You should have received copies of the GNU General Public License and the +GNU Lesser General Public License along with the GNU MP Library. If not, +see https://www.gnu.org/licenses/. */ + + +#include "mpn/generic/mullo_basecase.c" diff --git a/gmp-6.3.0/mpn/x86/fat/redc_1.c b/gmp-6.3.0/mpn/x86/fat/redc_1.c new file mode 100644 index 0000000..0025403 --- /dev/null +++ b/gmp-6.3.0/mpn/x86/fat/redc_1.c @@ -0,0 +1,32 @@ +/* Fat binary fallback mpn_redc_1. + +Copyright 2012 Free Software Foundation, Inc. + +This file is part of the GNU MP Library. + +The GNU MP Library is free software; you can redistribute it and/or modify +it under the terms of either: + + * the GNU Lesser General Public License as published by the Free + Software Foundation; either version 3 of the License, or (at your + option) any later version. + +or + + * the GNU General Public License as published by the Free Software + Foundation; either version 2 of the License, or (at your option) any + later version. + +or both in parallel, as here. + +The GNU MP Library is distributed in the hope that it will be useful, but +WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +You should have received copies of the GNU General Public License and the +GNU Lesser General Public License along with the GNU MP Library. If not, +see https://www.gnu.org/licenses/. */ + + +#include "mpn/generic/redc_1.c" diff --git a/gmp-6.3.0/mpn/x86/fat/redc_2.c b/gmp-6.3.0/mpn/x86/fat/redc_2.c new file mode 100644 index 0000000..1932d58 --- /dev/null +++ b/gmp-6.3.0/mpn/x86/fat/redc_2.c @@ -0,0 +1,32 @@ +/* Fat binary fallback mpn_redc_2. + +Copyright 2012 Free Software Foundation, Inc. + +This file is part of the GNU MP Library. + +The GNU MP Library is free software; you can redistribute it and/or modify +it under the terms of either: + + * the GNU Lesser General Public License as published by the Free + Software Foundation; either version 3 of the License, or (at your + option) any later version. + +or + + * the GNU General Public License as published by the Free Software + Foundation; either version 2 of the License, or (at your option) any + later version. + +or both in parallel, as here. + +The GNU MP Library is distributed in the hope that it will be useful, but +WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +You should have received copies of the GNU General Public License and the +GNU Lesser General Public License along with the GNU MP Library. If not, +see https://www.gnu.org/licenses/. */ + + +#include "mpn/generic/redc_2.c" |